HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip

Martti Forsell; Jesper Larsson Träff

doi:10.1007/978-3-642-14122-5_1

HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip

Martti Forsell
, Jesper Larsson Träff

NEC Europe

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific

Abstract

To counter the relative decline in traditional, single-processor performance, architectures with significant on-chip parallelism for special and general-purpose computation have been marketed in the past few years with various degrees of success. Although the shift toward (general-purpose) parallel processing is inevitable and generally accepted, the road to travel is still essentially unclear - perhaps even unknown, as witnessed by the many different architectural proposals and products by both large and smaller vendors, the usual hype, as well as research projects in many different directions.

Original language	English
Title of host publication	Euro-Par 2009
Subtitle of host publication	Parallel Processing Workshops
Editors	Hai-Xiang Lin, Michael Alexander, Martti Forsell, Andreas Knüpfer, Radu Prodan, Leonel Sousa, Achim Streit
Place of Publication	Berlin
Publisher	Springer
Pages	3-5
ISBN (Electronic)	978-3-642-14122-5
ISBN (Print)	978-3-642-14121-8
DOIs	https://doi.org/10.1007/978-3-642-14122-5_1
Publication status	Published - 2010
MoE publication type	B3 Non-refereed article in conference proceedings
Event	Euro-Par 2009 : Parallel Processing Workshops - Delft, Netherlands Duration: 25 Aug 2009 → 28 Aug 2009

Publication series

Series	Lecture Notes in Computer Science
Volume	6043
ISSN	0302-9743

Workshop

Workshop	Euro-Par 2009
Country/Territory	Netherlands
City	Delft
Period	25/08/09 → 28/08/09

Access to Document

10.1007/978-3-642-14122-5_1

Cite this

@inproceedings{cc2af351ba994048aaa6b882cf1fe922,

title = "HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip",

abstract = "To counter the relative decline in traditional, single-processor performance, architectures with significant on-chip parallelism for special and general-purpose computation have been marketed in the past few years with various degrees of success. Although the shift toward (general-purpose) parallel processing is inevitable and generally accepted, the road to travel is still essentially unclear - perhaps even unknown, as witnessed by the many different architectural proposals and products by both large and smaller vendors, the usual hype, as well as research projects in many different directions.",

author = "Martti Forsell and \{Larsson Tr{\"a}ff\}, Jesper",

year = "2010",

doi = "10.1007/978-3-642-14122-5\_1",

language = "English",

isbn = "978-3-642-14121-8",

series = "Lecture Notes in Computer Science",

publisher = "Springer",

pages = "3--5",

editor = "Hai-Xiang Lin and Alexander, \{Michael \} and Forsell, \{Martti \} and Kn{\"u}pfer, \{Andreas \} and Prodan, \{Radu \} and Sousa, \{Leonel \} and Streit, \{Achim \}",

booktitle = "Euro-Par 2009",

address = "Germany",

note = "Euro-Par 2009<br/> : Parallel Processing Workshops ; Conference date: 25-08-2009 Through 28-08-2009",

}

Forsell, M & Larsson Träff, J 2010, HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip. in H-X Lin, M Alexander, M Forsell, A Knüpfer, R Prodan, L Sousa & A Streit (eds), Euro-Par 2009: Parallel Processing Workshops. Springer, Berlin, Lecture Notes in Computer Science, vol. 6043, pp. 3-5, Euro-Par 2009
, Delft, Netherlands, 25/08/09. https://doi.org/10.1007/978-3-642-14122-5_1

HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip. / Forsell, Martti; Larsson Träff, Jesper.
Euro-Par 2009: Parallel Processing Workshops. ed. / Hai-Xiang Lin; Michael Alexander; Martti Forsell; Andreas Knüpfer; Radu Prodan; Leonel Sousa; Achim Streit. Berlin: Springer, 2010. p. 3-5 (Lecture Notes in Computer Science, Vol. 6043).

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific

TY - GEN

T1 - HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip

AU - Forsell, Martti

AU - Larsson Träff, Jesper

PY - 2010

Y1 - 2010

N2 - To counter the relative decline in traditional, single-processor performance, architectures with significant on-chip parallelism for special and general-purpose computation have been marketed in the past few years with various degrees of success. Although the shift toward (general-purpose) parallel processing is inevitable and generally accepted, the road to travel is still essentially unclear - perhaps even unknown, as witnessed by the many different architectural proposals and products by both large and smaller vendors, the usual hype, as well as research projects in many different directions.

AB - To counter the relative decline in traditional, single-processor performance, architectures with significant on-chip parallelism for special and general-purpose computation have been marketed in the past few years with various degrees of success. Although the shift toward (general-purpose) parallel processing is inevitable and generally accepted, the road to travel is still essentially unclear - perhaps even unknown, as witnessed by the many different architectural proposals and products by both large and smaller vendors, the usual hype, as well as research projects in many different directions.

U2 - 10.1007/978-3-642-14122-5_1

DO - 10.1007/978-3-642-14122-5_1

M3 - Conference article in proceedings

SN - 978-3-642-14121-8

T3 - Lecture Notes in Computer Science

SP - 3

EP - 5

BT - Euro-Par 2009

A2 - Lin, Hai-Xiang

A2 - Alexander, Michael

A2 - Forsell, Martti

A2 - Knüpfer, Andreas

A2 - Prodan, Radu

A2 - Sousa, Leonel

A2 - Streit, Achim

PB - Springer

CY - Berlin

T2 - Euro-Par 2009<br/>

Y2 - 25 August 2009 through 28 August 2009

ER -

HPPC 2009: 3rd Workshop on Highly Parallel Processing on a Chip

Abstract

Publication series

Workshop

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Cite this