The authors present a systematic study of the modelling, design, and fabrication of planar spiral inductors implemented in a high speed 0.8 μm BiCMOS technology, and characterised for use in portable VHF applications, Both a fully empirical distributed equivalent circuit model and a more accurate semiempirical model for the integrated inductors have been developed and tested. The latter broadband model is scalable and thus applicable also for inductor design. The IC compatible inductors on silicon were fabricated using a process featuring oxide isolation and two layers of metal. For comparison, some test inductors were also fabricated using nonstandard techniques such as 4 μm thick oxides and 4 μm thick Al metallisation. The rectangular spiral inductors showed larger Q values than the octagonal ones. The largest Q value measured was 16. As expected, this value was obtained by using a combination of thick oxide and thick metallisation. The results are encouraging for the use of integrated inductors in silicon RF ICs in the GHz frequency range.
|Journal||IEE Proceedings, Part G: Circuits, Devices and Systems|
|Publication status||Published - Feb 1997|
|MoE publication type||A4 Article in a conference publication|
Ronkainen, H., Kattelus, H., Tarvainen, E., Riihisaari, T., Andersson, M., & Kuivalainen, P. (1997). IC compatible planar inductors on silicon. IEE Proceedings, Part G: Circuits, Devices and Systems, 144(1), 29-35. https://doi.org/10.1049/ip-cds:19970748