Implementation aspects of fault-tolerant logic built with single-electron devices

Jacek Flak, Mika Laiho

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

2 Citations (Scopus)

Abstract

This paper presents a single-electron tunneling (SET) device implementation of gates needed to build a nanoscale logic array for fault-tolerant computing. The proposed architecture is based on a regular array of locally interconnected SET gates controlled by CMOS peripheries. Embedded hardware and information redundancies help to surmount the limited reliability of nanodevices. Such a logic system can be versatile due to binary programmable interconnections. Gate structures designed for SET technology are presented and their simulation results are discussed.
Original languageEnglish
Title of host publicationProceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009
PublisherIEEE Institute of Electrical and Electronic Engineers
Number of pages4
ISBN (Electronic)978-1-4244-4311-6
ISBN (Print)978-1-4244-4310-9
DOIs
Publication statusPublished - 2009
MoE publication typeA4 Article in a conference publication
Event2009 NORCHIP Conference - Trondheim, Norway
Duration: 16 Nov 200917 Nov 2009

Conference

Conference2009 NORCHIP Conference
CountryNorway
CityTrondheim
Period16/11/0917/11/09

Fingerprint

Electron devices
Electron tunneling
Fault tolerant computer systems
Redundancy
Hardware

Cite this

Flak, J., & Laiho, M. (2009). Implementation aspects of fault-tolerant logic built with single-electron devices. In Proceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009 IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/NORCHP.2009.5397816
Flak, Jacek ; Laiho, Mika. / Implementation aspects of fault-tolerant logic built with single-electron devices. Proceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009. IEEE Institute of Electrical and Electronic Engineers , 2009.
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Flak, J & Laiho, M 2009, Implementation aspects of fault-tolerant logic built with single-electron devices. in Proceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009. IEEE Institute of Electrical and Electronic Engineers , 2009 NORCHIP Conference, Trondheim, Norway, 16/11/09. https://doi.org/10.1109/NORCHP.2009.5397816

Implementation aspects of fault-tolerant logic built with single-electron devices. / Flak, Jacek; Laiho, Mika.

Proceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009. IEEE Institute of Electrical and Electronic Engineers , 2009.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Flak J, Laiho M. Implementation aspects of fault-tolerant logic built with single-electron devices. In Proceedings of 2009 NORCHIP. Trondheim, Norway, 16 - 17 Nov. 2009. IEEE Institute of Electrical and Electronic Engineers . 2009 https://doi.org/10.1109/NORCHP.2009.5397816