Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking

Yang Qu, Juha-Pekka Soininen, Jari Nurmi

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    5 Citations (Scopus)

    Abstract

    Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we present a novel configuration locking technique to reduce the effect of the overhead. The idea is to at run-time lock a number of the most frequently used tasks on the configuration memory so that they cannot be evicted by other tasks. With real applications in validation, the results show that using proper amount of resources to lock tasks can significantly outperform simply using more resources. In addition, an algorithm has been developed for estimating the lock ratio. Experimental results show that the estimates are close to optimal results and the measured computer runtime is less than 4 us in a commercial embedded processo
    Original languageEnglish
    Title of host publicationProceedings
    Subtitle of host publicationDesign, Automation & Test in Europe, DATE 2008
    Place of PublicationLos Alamitos CA, Washington, Brussels, Tokyo
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages264-267
    ISBN (Print)978-3-9810-8014-8, 978-3-9810-8013-1
    DOIs
    Publication statusPublished - 2008
    MoE publication typeA4 Article in a conference publication
    EventDesign, Automation and Test in Europe, DATE 2008 - Munich, Germany
    Duration: 10 Mar 200814 Mar 2008

    Conference

    ConferenceDesign, Automation and Test in Europe, DATE 2008
    Abbreviated titleDATE 2008
    CountryGermany
    CityMunich
    Period10/03/0814/03/08

    Fingerprint

    Data storage equipment
    System-on-chip

    Keywords

    • Reconfigurable design
    • configuration locking

    Cite this

    Qu, Y., Soininen, J-P., & Nurmi, J. (2008). Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. In Proceedings: Design, Automation & Test in Europe, DATE 2008 (pp. 264-267). Los Alamitos CA, Washington, Brussels, Tokyo: IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/DATE.2008.4484894
    Qu, Yang ; Soininen, Juha-Pekka ; Nurmi, Jari. / Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. Proceedings: Design, Automation & Test in Europe, DATE 2008. Los Alamitos CA, Washington, Brussels, Tokyo : IEEE Institute of Electrical and Electronic Engineers , 2008. pp. 264-267
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    abstract = "Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we present a novel configuration locking technique to reduce the effect of the overhead. The idea is to at run-time lock a number of the most frequently used tasks on the configuration memory so that they cannot be evicted by other tasks. With real applications in validation, the results show that using proper amount of resources to lock tasks can significantly outperform simply using more resources. In addition, an algorithm has been developed for estimating the lock ratio. Experimental results show that the estimates are close to optimal results and the measured computer runtime is less than 4 us in a commercial embedded processo",
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    Qu, Y, Soininen, J-P & Nurmi, J 2008, Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. in Proceedings: Design, Automation & Test in Europe, DATE 2008. IEEE Institute of Electrical and Electronic Engineers , Los Alamitos CA, Washington, Brussels, Tokyo, pp. 264-267, Design, Automation and Test in Europe, DATE 2008, Munich, Germany, 10/03/08. https://doi.org/10.1109/DATE.2008.4484894

    Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. / Qu, Yang; Soininen, Juha-Pekka; Nurmi, Jari.

    Proceedings: Design, Automation & Test in Europe, DATE 2008. Los Alamitos CA, Washington, Brussels, Tokyo : IEEE Institute of Electrical and Electronic Engineers , 2008. p. 264-267.

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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    N2 - Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we present a novel configuration locking technique to reduce the effect of the overhead. The idea is to at run-time lock a number of the most frequently used tasks on the configuration memory so that they cannot be evicted by other tasks. With real applications in validation, the results show that using proper amount of resources to lock tasks can significantly outperform simply using more resources. In addition, an algorithm has been developed for estimating the lock ratio. Experimental results show that the estimates are close to optimal results and the measured computer runtime is less than 4 us in a commercial embedded processo

    AB - Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we present a novel configuration locking technique to reduce the effect of the overhead. The idea is to at run-time lock a number of the most frequently used tasks on the configuration memory so that they cannot be evicted by other tasks. With real applications in validation, the results show that using proper amount of resources to lock tasks can significantly outperform simply using more resources. In addition, an algorithm has been developed for estimating the lock ratio. Experimental results show that the estimates are close to optimal results and the measured computer runtime is less than 4 us in a commercial embedded processo

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    Qu Y, Soininen J-P, Nurmi J. Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. In Proceedings: Design, Automation & Test in Europe, DATE 2008. Los Alamitos CA, Washington, Brussels, Tokyo: IEEE Institute of Electrical and Electronic Engineers . 2008. p. 264-267 https://doi.org/10.1109/DATE.2008.4484894