Instantiating GENESYS application architecture modeling via UML 2.0 constructs and MARTE profile

Subayal Khan, Kari Tiensyrjä, Jari Nurmi

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

2 Citations (Scopus)

Abstract

Modeling of complex and computationally intense applications supported by modern mobile devices via standard modeling languages is a challenging task. Within the GENESYS process model the application modeling phase is thus of key importance. GENESYS manages complexity by employing cross-domain and platform-based application design. The main contribution of this article is to describe the instantiation of GENESYS application architecture modeling via MARTE profile and describe a methodology for validation of non functional properties annotated in the application model.
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages251-254
ISBN (Print)978-1-4244-7839-2
DOIs
Publication statusPublished - 2010
MoE publication typeA4 Article in a conference publication
Event13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010 - Lille, France
Duration: 1 Sep 20103 Sep 2010

Conference

Conference13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010
Abbreviated titleDSD 2010
CountryFrance
CityLille
Period1/09/103/09/10

Keywords

  • GENESYS
  • application modelling
  • application service
  • platform service
  • performance evaluation
  • MARTE UML2.0 profile
  • Papyrus
  • SystemC

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    Khan, S., Tiensyrjä, K., & Nurmi, J. (2010). Instantiating GENESYS application architecture modeling via UML 2.0 constructs and MARTE profile. In Proceedings : 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools, DSD 2010 (pp. 251-254). IEEE Institute of Electrical and Electronic Engineers. https://doi.org/10.1109/DSD.2010.36