Integration and Packaging of Optoelectronic and Silicon Photonic Chips on a µm-scale SOI Platform

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsProfessional

    Abstract

    An overview of an integration platform with 1–10 µm thick silicon-on-insulator waveguides is given. It is suitable for the integration and packaging of optoelectronic and silicon photonic (nm-scale) chips. The platform can also contain many passive functions, such as spot-size converters, couplers, wavelength (de)multiplexers/filters and polarization splitters. The footprint of the platform is minimized by using multi-step patterning to realize e.g. mirrors and short MMI couplers
    Original languageEnglish
    Title of host publicationEuropean Conference on Integrated Photonics website
    Number of pages2
    Publication statusPublished - 2012
    MoE publication typeD3 Professional conference proceedings
    Event16th European Conference on Integrated Optics ECIO 2012 - Sitges, Barcelona, Spain
    Duration: 18 Apr 201220 Apr 2012

    Conference

    Conference16th European Conference on Integrated Optics ECIO 2012
    CountrySpain
    CityBarcelona
    Period18/04/1220/04/12

      Fingerprint

    Keywords

    • Silicon-on-insulator
    • SOI
    • integration platform
    • silicon photonics
    • optoelectronics
    • hybrid integration
    • packaging

    Cite this