IP-block based integration of very high performance WLAN modem

Jussi Roivainen, Jukka Rautio

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    Abstract

    In the IP-block based design the problems of integration work have not been discussed as thoroughly as IP-block development, system development or physical designing problems. The complexity of controlling is the major design challenge, especially in communication devices where the network sets parameters for control. In this paper, we present the FAR (Flexible, Adaptive, Reconfigurable) demonstrator integration for FPGA platform, the integration problems and lessons learned. The challenges in the integration work are identified, including complexity, interface style diversity and control requirements. The incremental integration approach was found effective strategy to manage and solve the challenges. Dividing the work is required to manage complexity but effective co-operation with designers is a necessity for preventing new artificial interfaces.
    Original languageEnglish
    Title of host publicationProceedings of the EUROMICRO Symposium on Digital System Design, DSD 2004
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages200-207
    ISBN (Print)0-7695-2203-3
    DOIs
    Publication statusPublished - 2004
    MoE publication typeA4 Article in a conference publication
    EventEuromicro Symposium on Digital System Design, DSD 2004 - Rennes, France
    Duration: 31 Aug 20043 Sep 2004

    Conference

    ConferenceEuromicro Symposium on Digital System Design, DSD 2004
    CountryFrance
    CityRennes
    Period31/08/043/09/04

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