IP-block based integration of very high performance WLAN modem

In the IP-block based design the problems of integration work have not been discussed as thoroughly as IP-block development, system development or physical designing problems. The complexity of controlling is the major design challenge, especially in communication devices where the network sets parameters for control. In this paper, we present the FAR (Flexible, Adaptive, Reconfigurable) demonstrator integration for FPGA platform, the integration problems and lessons learned. The challenges in the integration work are identified, including complexity, interface style diversity and control requirements. The incremental integration approach was found effective strategy to manage and solve the challenges. Dividing the work is required to manage complexity but effective co-operation with designers is a necessity for preventing new artificial interfaces.