Low Loss Devices fabricated on the Open Access 3 µm SOI Waveguide Platform at VTT

In this paper, the latest results on some of the building block devices and components fabricated on VTT's PIC platform, that is based on 3 µm thick Silicon-On-Insulator (SOI) waveguides [1], is presented. As part of the plans
in developing the platform further, AWG and Echelle grating (EG) designs, with insertion loss in the range of 1-3 dB, and an extinction ratio reaching up to 35 dB have been designed and fabricated as part of the recent MPW run, and the measurement results are presented. Novel 45o vertical coupling TIR mirrors have also been realized (with AR coating) as a new building block on this platform, and have been integrated with the waveguides. The measured coupling losses to/from lensed fibers are below 0.5 dB, which are better in comparison to the coupling loss from the etched facets at the edges of the chip (~ 1 dB). The main advantages of this thick SOI platform are low loss, dense integration, polarization independent and broadband operation, high optical power throughput, and smooth transition from prototyping to volume production. Open access via multi-project wafer (MPW) runs, dedicated process runs, prototyping and small-to-medium volume production services are provided.