Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach

P. Candaele, S. Aguirre, M. Sarlotte, I. Anagnostopoulos, S. Xydis, A. Bartzas, D. Bekiaris, D. Soudris, Zhonghai Lu, Xiaowen Chen, J. Chabloz, A. Hemani, A. Jantsch, G. Vanmeerbeeck, Jari Kreku, Kari Tiensyrjä, F. Ieromnimon, D. Kritharidis, A. Wiefrink, B. VanthournoutP. Martin

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

The project will address two main challenges of prevailing architectures: 1) The global interconnect and memory bottleneck due to a single, globally shared memory with high access times and power consumption, 2) The difficulties in programming heterogeneous, multi-core platforms, in particular in dynamically managing data structures in distributed memory. MOSART aims to overcome these through a multi-core architecture with distributed memory organisation, a Network-on-Chip (NoC) communication backbone and configurable processing cores that are scaled, optimised and customised together to achieve diverse energy, performance, cost and size requirements of different classes of applications. MOSART achieves this by: A) Providing platform support for management of abstract data structures including middleware services and a run-time data manager for NoC based communication infrastructure, 2) Developing tool support for parallelizing and mapping application son the multi-core target platform and customizing the processing cores for the application. (9 refs.)
Original languageEnglish
Title of host publicationProceedings of the IEEE Computer Society Annual Symposium on VLSI 2010 (ISVLSI)
Place of PublicationLos Alamitos, CA, USA
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages518-523
ISBN (Electronic)978-1-4244-7320-5
ISBN (Print)978-1-4244-7321-2
DOIs
Publication statusPublished - 2010
MoE publication typeA4 Article in a conference publication
EventIEEE Computer Society Annual Symposium on VLSI 2010 (ISVLSI) - Lixouri, Kefalonia, Greece
Duration: 5 Jul 20107 Jul 2010

Conference

ConferenceIEEE Computer Society Annual Symposium on VLSI 2010 (ISVLSI)
Abbreviated titleVLSI 2010
CountryGreece
CityLixouri, Kefalonia
Period5/07/107/07/10

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Candaele, P., Aguirre, S., Sarlotte, M., Anagnostopoulos, I., Xydis, S., Bartzas, A., Bekiaris, D., Soudris, D., Lu, Z., Chen, X., Chabloz, J., Hemani, A., Jantsch, A., Vanmeerbeeck, G., Kreku, J., Tiensyrjä, K., Ieromnimon, F., Kritharidis, D., Wiefrink, A., ... Martin, P. (2010). Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. In Proceedings of the IEEE Computer Society Annual Symposium on VLSI 2010 (ISVLSI) (pp. 518-523). IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/ISVLSI.2010.71