MEMS on cavity-SOI wafers

Hannu Luoto, Kimmo Henttinen (Corresponding Author), Tommi Suni, James Dekker, Jari Mäkinen, Altti Torkkeli

Research output: Contribution to journalArticleScientificpeer-review

24 Citations (Scopus)

Abstract

Silicon-on-insulator wafers with pre-etched cavities provide freedom to MEMS design. We have studied direct bonding and mechanical thinning of pre-etched silicon wafers. We have found out that during the thinning process the flexibility of the diaphragm causes a variation in their thickness. The integrity, thickness variation and shape of thinned diaphragms are dictated by cavity dimensions, SOI thickness, cavity vacuum and thinning process. These variables have been in this study put together to form design rules for cavity-SOI manufacturing. The pre-etched cavities enable the release etching of SOI devices using dry etching. We have demonstrated fabrication and functionality of two different types of MEMS-devices.

Original languageEnglish
Pages (from-to)328-332
JournalSolid-State Electronics
Volume51
Issue number2
DOIs
Publication statusPublished - 2007
MoE publication typeA1 Journal article-refereed

Fingerprint

SOI (semiconductors)
Diaphragms
microelectromechanical systems
MEMS
wafers
cavities
Dry etching
Silicon
Silicon wafers
diaphragms
Etching
Vacuum
Fabrication
etching
silicon
integrity
flexibility
manufacturing
insulators
vacuum

Keywords

  • Cavity-SOI
  • SOI
  • Silicon-on-insulator
  • wafer bonding
  • CSOI
  • SOI-MEMS
  • MEMS
  • RF-MEMS
  • resonators

Cite this

Luoto, H., Henttinen, K., Suni, T., Dekker, J., Mäkinen, J., & Torkkeli, A. (2007). MEMS on cavity-SOI wafers. Solid-State Electronics, 51(2), 328-332. https://doi.org/10.1016/j.sse.2007.01.007
Luoto, Hannu ; Henttinen, Kimmo ; Suni, Tommi ; Dekker, James ; Mäkinen, Jari ; Torkkeli, Altti. / MEMS on cavity-SOI wafers. In: Solid-State Electronics. 2007 ; Vol. 51, No. 2. pp. 328-332.
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Luoto, H, Henttinen, K, Suni, T, Dekker, J, Mäkinen, J & Torkkeli, A 2007, 'MEMS on cavity-SOI wafers', Solid-State Electronics, vol. 51, no. 2, pp. 328-332. https://doi.org/10.1016/j.sse.2007.01.007

MEMS on cavity-SOI wafers. / Luoto, Hannu; Henttinen, Kimmo (Corresponding Author); Suni, Tommi; Dekker, James; Mäkinen, Jari; Torkkeli, Altti.

In: Solid-State Electronics, Vol. 51, No. 2, 2007, p. 328-332.

Research output: Contribution to journalArticleScientificpeer-review

TY - JOUR

T1 - MEMS on cavity-SOI wafers

AU - Luoto, Hannu

AU - Henttinen, Kimmo

AU - Suni, Tommi

AU - Dekker, James

AU - Mäkinen, Jari

AU - Torkkeli, Altti

PY - 2007

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AB - Silicon-on-insulator wafers with pre-etched cavities provide freedom to MEMS design. We have studied direct bonding and mechanical thinning of pre-etched silicon wafers. We have found out that during the thinning process the flexibility of the diaphragm causes a variation in their thickness. The integrity, thickness variation and shape of thinned diaphragms are dictated by cavity dimensions, SOI thickness, cavity vacuum and thinning process. These variables have been in this study put together to form design rules for cavity-SOI manufacturing. The pre-etched cavities enable the release etching of SOI devices using dry etching. We have demonstrated fabrication and functionality of two different types of MEMS-devices.

KW - Cavity-SOI

KW - SOI

KW - Silicon-on-insulator

KW - wafer bonding

KW - CSOI

KW - SOI-MEMS

KW - MEMS

KW - RF-MEMS

KW - resonators

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DO - 10.1016/j.sse.2007.01.007

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Luoto H, Henttinen K, Suni T, Dekker J, Mäkinen J, Torkkeli A. MEMS on cavity-SOI wafers. Solid-State Electronics. 2007;51(2):328-332. https://doi.org/10.1016/j.sse.2007.01.007