Methods for Verification & Validation of time-triggered embedded systems

Keyphrases

• Design Process 100%
• Embedded Systems 100%
• Method Validation 100%
• Verification & Validation 100%
• Time-triggered 100%
• Safety-related 50%
• Risk Assessment 50%
• System Level 50%
• Distributed Systems 50%
• Assessment Design 50%
• Safety Considerations 50%
• Redundancy 50%
• IEC 61508 50%
• Safety Lifecycle 50%
• Design Validation 50%
• Means of Communication 50%
• Fieldbus 50%
• Distributed Embedded Systems 50%
• Safety Verification 50%
• Assessment Validation 50%
• Time-triggered Systems 50%
• Modern Communication 50%
• Communication Concepts 50%

INIS

• validation 100%
• verification 100%
• safety 80%
• design 60%
• levels 40%
• comparative evaluations 20%
• buses 20%
• risk assessment 20%
• redundancy 20%

Computer Science

• Embedded Systems 100%
• Validation Method 100%
• Assessment Design 50%
• Distributed Systems 50%
• Communication Mean 50%
• Fieldbus 50%