Model for DMOST threshold voltage

Kaj Grahn, Mikael Andersson, Pekka Kuivalainen, Simo Eränen

Research output: Contribution to journalArticleScientificpeer-review

3 Citations (Scopus)

Abstract

An analytical model for the channel region in MOS-gated power transistors has been developed. The model takes into account the effect of substrate doping gradient on the threshold voltage of the transistor and it can be applied to lateral and vertical DMOS and IGBT transistor structures. The model has been tested by comparing the calculated I-V characteristics for an MOS structure having various doping gradients to the results from a 2-D device simulator.
Original languageEnglish
Pages (from-to)1384-1385
Number of pages2
JournalElectronics Letters
Volume28
Issue number15
DOIs
Publication statusPublished - 1992
MoE publication typeA1 Journal article-refereed

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    Grahn, K., Andersson, M., Kuivalainen, P., & Eränen, S. (1992). Model for DMOST threshold voltage. Electronics Letters, 28(15), 1384-1385. https://doi.org/10.1049/el:19920880