Modeling capacitive links for broadband inter-chip communication

O. Viitala, Jacek Flak, S. Lindfors

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

4 Citations (Scopus)

Abstract

This paper presents the modeling of a close-proximity communication link with a lumped circuit representation. The inter-chip data transfer is performed via capacitive couplings between the top facing dies (flip-chip arrangement). The problems occuring in such a wireless communications are introduced. Based on three-dimensional (3D) electromagnetics (EM) simulations, a lumped circuit model for the capacitive link has been developed. The effect of cross-talk between adjacent channels is also considered in the model and discussed.
Original languageEnglish
Title of host publication25th Norchip Conference, NORCHIP 2007
Place of PublicationPiscataway, NJ, USA
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages142-145
ISBN (Print)978-1-4244-1516-8, 978-1-4244-1517-5
DOIs
Publication statusPublished - 2007
MoE publication typeA4 Article in a conference publication
Event25th Norchip Conference, Norchip 2007 - Alborg, Denmark
Duration: 19 Nov 200720 Nov 2007

Conference

Conference25th Norchip Conference, Norchip 2007
Abbreviated titleNorchip 2007
CountryDenmark
CityAlborg
Period19/11/0720/11/07

Fingerprint

Networks (circuits)
Communication
Data transfer
Telecommunication links

Cite this

Viitala, O., Flak, J., & Lindfors, S. (2007). Modeling capacitive links for broadband inter-chip communication. In 25th Norchip Conference, NORCHIP 2007 (pp. 142-145). Piscataway, NJ, USA: IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/NORCHP.2007.4481058
Viitala, O. ; Flak, Jacek ; Lindfors, S. / Modeling capacitive links for broadband inter-chip communication. 25th Norchip Conference, NORCHIP 2007. Piscataway, NJ, USA : IEEE Institute of Electrical and Electronic Engineers , 2007. pp. 142-145
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Viitala, O, Flak, J & Lindfors, S 2007, Modeling capacitive links for broadband inter-chip communication. in 25th Norchip Conference, NORCHIP 2007. IEEE Institute of Electrical and Electronic Engineers , Piscataway, NJ, USA, pp. 142-145, 25th Norchip Conference, Norchip 2007, Alborg, Denmark, 19/11/07. https://doi.org/10.1109/NORCHP.2007.4481058

Modeling capacitive links for broadband inter-chip communication. / Viitala, O.; Flak, Jacek; Lindfors, S.

25th Norchip Conference, NORCHIP 2007. Piscataway, NJ, USA : IEEE Institute of Electrical and Electronic Engineers , 2007. p. 142-145.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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Viitala O, Flak J, Lindfors S. Modeling capacitive links for broadband inter-chip communication. In 25th Norchip Conference, NORCHIP 2007. Piscataway, NJ, USA: IEEE Institute of Electrical and Electronic Engineers . 2007. p. 142-145 https://doi.org/10.1109/NORCHP.2007.4481058