The feasibility of a depleted junction field effect transistor (JFET) detector structure which is a combined radiation detector and low-noise charge readout transistor is studied computationally. The operating principle of the depleted p-JET detector incorporating a p-channel JFET structure processed on the surface of a high-resistivity n-type silicon chip is described. Results from two-dimensional potential and charge carrier concentration simulation of the structure indicate that the charge signal can be successfully read out by the FET provided that an appropriate doping profile shape is implemented in the device.
|Journal||IEEE Transactions on Nuclear Science|
|Publication status||Published - 1992|
|MoE publication type||A1 Journal article-refereed|