Abstract
We present a completely new kind of approach for mapping the computation
of an application to MP-SOC architecture. Instead of moving data read and
write requests, extremely lightweight threads are moved between the processor
cores. As a consequence, all kinds of cache coherence problems and need for
read reply messages are eliminated. Lamport's sequential consistency of shared
memory multiprocessor systems and flexible and efficient handling of varying
number of threads are achieved for free. In our architecture, the challenge of
having efficient implementation of an application reduces to mapping the used
data so that the need to move threads is balanced with respect to the
bandwidth of the local memories/intercommunication network. We outline
required architectural techniques, apply them to a multithreaded shared memory
MP-SOC framework and consider programming, compiling and runtime memory as
well as thread handling issues. Few locality-aware mappings for common
problems are demonstrated.
Original language | English |
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Title of host publication | Proceedings of the 2007 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2007 |
Editors | Hamid R. Arabnia |
Publisher | CSREA Press |
Pages | 232-238 |
ISBN (Print) | 1601320221, 1601320205, 1601320213 |
Publication status | Published - 2007 |
MoE publication type | A4 Article in a conference publication |
Event | 2007 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2007 - Las Vegas, United States Duration: 25 Jun 2007 → 28 Jun 2007 |
Conference
Conference | 2007 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA 2007 |
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Abbreviated title | PDPTA 2007 |
Country/Territory | United States |
City | Las Vegas |
Period | 25/06/07 → 28/06/07 |
Keywords
- Moving threads
- parallelism
- MP-SOC
- mapping
- locality