Multi-threading support for system-level performance simulation of multi-core architectures

Jukka Saastamoinen, Subayal Khan, Kari Tiensyrjä, Tapio Taipale

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

Multi-threaded programming is gaining popularity as general purpose processors have evolved to multi-core platforms. This brings new challenges for software designers. In the early phases of multi-threaded applications development designers have to do design decisions regarding load-balancing, thread management and synchronization. Even for moderately complex applications with relatively small number of concurrent threads, the design space will be large and its exploration requires that the designer is able to quickly evaluate performance of the candidate software architecture on the chosen platform. System-level performance simulation of the applications and platforms using abstracted workload and processing capability models suits to this purpose. These virtual system models enable fast simulation of multi-threaded applications in the early phases of the design process with reasonable modeling effort. This paper presents a performance modelling and simulation approach to explore efficiently multi-threaded applications and multi-core architectures at system-level , while exploiting earlier developed overall approach. Abstract workload models are generated from POSIX threaded application source code and mapped onto execution platform for transaction level simulation. The resulting workload models are simulated using network traffic monitor application example.
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication 24th International Conference on Architecture of Computing Systems, ARCS 2011
PublisherVDE Verlag
Pages169-177
ISBN (Print)978-3-8007-3333-0
Publication statusPublished - 2011
MoE publication typeA4 Article in a conference publication
Event24th International Conference on Architecture of Computing Systems, ARCS 2011 - Como, Italy
Duration: 22 Feb 201123 Feb 2011

Conference

Conference24th International Conference on Architecture of Computing Systems, ARCS 2011
Abbreviated titleARCS 2011
CountryItaly
CityComo
Period22/02/1123/02/11

Fingerprint

Software architecture
Resource allocation
Synchronization
Processing

Keywords

  • multi-core
  • SystemC
  • POSIX-thread

Cite this

Saastamoinen, J., Khan, S., Tiensyrjä, K., & Taipale, T. (2011). Multi-threading support for system-level performance simulation of multi-core architectures. In Proceedings: 24th International Conference on Architecture of Computing Systems, ARCS 2011 (pp. 169-177). VDE Verlag.
Saastamoinen, Jukka ; Khan, Subayal ; Tiensyrjä, Kari ; Taipale, Tapio. / Multi-threading support for system-level performance simulation of multi-core architectures. Proceedings: 24th International Conference on Architecture of Computing Systems, ARCS 2011 . VDE Verlag, 2011. pp. 169-177
@inproceedings{0874d6cfc3654ec0a61cd9b1bc2ab1a1,
title = "Multi-threading support for system-level performance simulation of multi-core architectures",
abstract = "Multi-threaded programming is gaining popularity as general purpose processors have evolved to multi-core platforms. This brings new challenges for software designers. In the early phases of multi-threaded applications development designers have to do design decisions regarding load-balancing, thread management and synchronization. Even for moderately complex applications with relatively small number of concurrent threads, the design space will be large and its exploration requires that the designer is able to quickly evaluate performance of the candidate software architecture on the chosen platform. System-level performance simulation of the applications and platforms using abstracted workload and processing capability models suits to this purpose. These virtual system models enable fast simulation of multi-threaded applications in the early phases of the design process with reasonable modeling effort. This paper presents a performance modelling and simulation approach to explore efficiently multi-threaded applications and multi-core architectures at system-level , while exploiting earlier developed overall approach. Abstract workload models are generated from POSIX threaded application source code and mapped onto execution platform for transaction level simulation. The resulting workload models are simulated using network traffic monitor application example.",
keywords = "multi-core, SystemC, POSIX-thread",
author = "Jukka Saastamoinen and Subayal Khan and Kari Tiensyrj{\"a} and Tapio Taipale",
note = "Project code: 39998",
year = "2011",
language = "English",
isbn = "978-3-8007-3333-0",
pages = "169--177",
booktitle = "Proceedings",
publisher = "VDE Verlag",
address = "Germany",

}

Saastamoinen, J, Khan, S, Tiensyrjä, K & Taipale, T 2011, Multi-threading support for system-level performance simulation of multi-core architectures. in Proceedings: 24th International Conference on Architecture of Computing Systems, ARCS 2011 . VDE Verlag, pp. 169-177, 24th International Conference on Architecture of Computing Systems, ARCS 2011, Como, Italy, 22/02/11.

Multi-threading support for system-level performance simulation of multi-core architectures. / Saastamoinen, Jukka; Khan, Subayal; Tiensyrjä, Kari; Taipale, Tapio.

Proceedings: 24th International Conference on Architecture of Computing Systems, ARCS 2011 . VDE Verlag, 2011. p. 169-177.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

TY - GEN

T1 - Multi-threading support for system-level performance simulation of multi-core architectures

AU - Saastamoinen, Jukka

AU - Khan, Subayal

AU - Tiensyrjä, Kari

AU - Taipale, Tapio

N1 - Project code: 39998

PY - 2011

Y1 - 2011

N2 - Multi-threaded programming is gaining popularity as general purpose processors have evolved to multi-core platforms. This brings new challenges for software designers. In the early phases of multi-threaded applications development designers have to do design decisions regarding load-balancing, thread management and synchronization. Even for moderately complex applications with relatively small number of concurrent threads, the design space will be large and its exploration requires that the designer is able to quickly evaluate performance of the candidate software architecture on the chosen platform. System-level performance simulation of the applications and platforms using abstracted workload and processing capability models suits to this purpose. These virtual system models enable fast simulation of multi-threaded applications in the early phases of the design process with reasonable modeling effort. This paper presents a performance modelling and simulation approach to explore efficiently multi-threaded applications and multi-core architectures at system-level , while exploiting earlier developed overall approach. Abstract workload models are generated from POSIX threaded application source code and mapped onto execution platform for transaction level simulation. The resulting workload models are simulated using network traffic monitor application example.

AB - Multi-threaded programming is gaining popularity as general purpose processors have evolved to multi-core platforms. This brings new challenges for software designers. In the early phases of multi-threaded applications development designers have to do design decisions regarding load-balancing, thread management and synchronization. Even for moderately complex applications with relatively small number of concurrent threads, the design space will be large and its exploration requires that the designer is able to quickly evaluate performance of the candidate software architecture on the chosen platform. System-level performance simulation of the applications and platforms using abstracted workload and processing capability models suits to this purpose. These virtual system models enable fast simulation of multi-threaded applications in the early phases of the design process with reasonable modeling effort. This paper presents a performance modelling and simulation approach to explore efficiently multi-threaded applications and multi-core architectures at system-level , while exploiting earlier developed overall approach. Abstract workload models are generated from POSIX threaded application source code and mapped onto execution platform for transaction level simulation. The resulting workload models are simulated using network traffic monitor application example.

KW - multi-core

KW - SystemC

KW - POSIX-thread

M3 - Conference article in proceedings

SN - 978-3-8007-3333-0

SP - 169

EP - 177

BT - Proceedings

PB - VDE Verlag

ER -

Saastamoinen J, Khan S, Tiensyrjä K, Taipale T. Multi-threading support for system-level performance simulation of multi-core architectures. In Proceedings: 24th International Conference on Architecture of Computing Systems, ARCS 2011 . VDE Verlag. 2011. p. 169-177