Abstract
We demonstrate experimentally an optical switch architecture that employs μm-SOI-based circuitry for both buffering and routing purposes and operates with 10 Gb/s optical packets in both uni- and multi-cast switching forwarding modes. It comprises a hybrid Broadcast-and-Select (BS) / wavelength-routed architecture, with the BS layout being responsible for identifying the desired cluster of outgoing ports, while the wavelength-routed switch part forwards then the data to the specific outgoing port. Contention resolution at the BS switch part is offered through an μm-SOI integrated optical delay line bank and wavelength-routing is realized by means of a μm-SOI 3×3 Echelle grating router, while SOA-MZIs are employed for wavelength conversion purposes. The switch architecture has been experimentally validated with 10 Gb/s optical data packets for both uni- and multicasting operation, revealing error-free performance with <5 dB power penalty.
| Original language | English |
|---|---|
| Pages (from-to) | 712-715 |
| Number of pages | 4 |
| Journal | IEEE Photonics Technology Letters |
| Volume | 30 |
| Issue number | 8 |
| DOIs | |
| Publication status | Published - 15 Apr 2018 |
| MoE publication type | A1 Journal article-refereed |
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Keywords
- Adaptive optics
- Delay lines
- Echelle Grating Router
- Field programmable gate arrays
- Integrated delay lines
- Optical buffering
- Optical switches
- Optical waveguides
- Optical wavelength conversion
- Photonic integrated circuits
- Silicon photonics
Cite this
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Multicast-enabling Optical Switch design employing Si Buffering and Routing Elements. / Moralis-Pegios, M.; Terzenidis, N.; Mourgias-Alexandris, G.; Cherchi, Matteo; Harjanne, Mikko; Aalto, Timo; Miliou, A.; Vyrsokinos, K.; Pleros, N.
In: IEEE Photonics Technology Letters, Vol. 30, No. 8, 15.04.2018, p. 712-715.Research output: Contribution to journal › Article › Scientific › peer-review
TY - JOUR
T1 - Multicast-enabling Optical Switch design employing Si Buffering and Routing Elements
AU - Moralis-Pegios, M.
AU - Terzenidis, N.
AU - Mourgias-Alexandris, G.
AU - Cherchi, Matteo
AU - Harjanne, Mikko
AU - Aalto, Timo
AU - Miliou, A.
AU - Vyrsokinos, K.
AU - Pleros, N.
PY - 2018/4/15
Y1 - 2018/4/15
N2 - We demonstrate experimentally an optical switch architecture that employs μm-SOI-based circuitry for both buffering and routing purposes and operates with 10 Gb/s optical packets in both uni- and multi-cast switching forwarding modes. It comprises a hybrid Broadcast-and-Select (BS) / wavelength-routed architecture, with the BS layout being responsible for identifying the desired cluster of outgoing ports, while the wavelength-routed switch part forwards then the data to the specific outgoing port. Contention resolution at the BS switch part is offered through an μm-SOI integrated optical delay line bank and wavelength-routing is realized by means of a μm-SOI 3×3 Echelle grating router, while SOA-MZIs are employed for wavelength conversion purposes. The switch architecture has been experimentally validated with 10 Gb/s optical data packets for both uni- and multicasting operation, revealing error-free performance with <5 dB power penalty.
AB - We demonstrate experimentally an optical switch architecture that employs μm-SOI-based circuitry for both buffering and routing purposes and operates with 10 Gb/s optical packets in both uni- and multi-cast switching forwarding modes. It comprises a hybrid Broadcast-and-Select (BS) / wavelength-routed architecture, with the BS layout being responsible for identifying the desired cluster of outgoing ports, while the wavelength-routed switch part forwards then the data to the specific outgoing port. Contention resolution at the BS switch part is offered through an μm-SOI integrated optical delay line bank and wavelength-routing is realized by means of a μm-SOI 3×3 Echelle grating router, while SOA-MZIs are employed for wavelength conversion purposes. The switch architecture has been experimentally validated with 10 Gb/s optical data packets for both uni- and multicasting operation, revealing error-free performance with <5 dB power penalty.
KW - Adaptive optics
KW - Delay lines
KW - Echelle Grating Router
KW - Field programmable gate arrays
KW - Integrated delay lines
KW - Optical buffering
KW - Optical switches
KW - Optical waveguides
KW - Optical wavelength conversion
KW - Photonic integrated circuits
KW - Silicon photonics
UR - http://www.scopus.com/inward/record.url?scp=85043355632&partnerID=8YFLogxK
U2 - 10.1109/LPT.2018.2813012
DO - 10.1109/LPT.2018.2813012
M3 - Article
AN - SCOPUS:85043355632
VL - 30
SP - 712
EP - 715
JO - IEEE Photonics Technology Letters
JF - IEEE Photonics Technology Letters
SN - 1041-1135
IS - 8
ER -