NoTA (Network on Terminal Architecture) is an architecture to ease connecting together different devices, or sub-systems inside a single device. DIP (Device Interconnect Protocol) stack is the backbone of each NoTA instance, consising of protocol layers necessary for passing data from one NoTA network endpoint to another. So far, only NoTA software implementations have been published. In this article, an FPGA hardware implementation of NoTA is evaluated. Part of the NoTA DIP (L_INdown layer for simplified RS-232) was designed, synthesised, implemented and verified on a Xilinx FPGA board ML507. The implementation was built purely in FPGA slice logic and no microcontroller was used. In this article, implemented NoTA FPGA demonstration and its challenges and results are briefly discussed.
|Place of Publication||Espoo|
|Publisher||VTT Technical Research Centre of Finland|
|Number of pages||20|
|Publication status||Published - 2009|
|MoE publication type||Not Eligible|
|Series||VTT Working Papers|
Metso, M. (2009). NoTA L_INdown Layer Implementation in FGPA: Design results. VTT Technical Research Centre of Finland. VTT Working Papers, No. 126 http://www.vtt.fi/inf/pdf/workingpapers/2009/W126.pdf