NoTA L_INdown Layer Implementation in FGPA

Design results

Research output: Book/ReportReportProfessional

Abstract

NoTA (Network on Terminal Architecture) is an architecture to ease connecting together different devices, or sub-systems inside a single device. DIP (Device Interconnect Protocol) stack is the backbone of each NoTA instance, consising of protocol layers necessary for passing data from one NoTA network endpoint to another. So far, only NoTA software implementations have been published. In this article, an FPGA hardware implementation of NoTA is evaluated. Part of the NoTA DIP (L_INdown layer for simplified RS-232) was designed, synthesised, implemented and verified on a Xilinx FPGA board ML507. The implementation was built purely in FPGA slice logic and no microcontroller was used. In this article, implemented NoTA FPGA demonstration and its challenges and results are briefly discussed.
Original languageEnglish
Place of PublicationEspoo
PublisherVTT Technical Research Centre of Finland
Number of pages20
ISBN (Electronic)978-951-38-7186-4
Publication statusPublished - 2009
MoE publication typeNot Eligible

Publication series

NameVTT Working Papers
PublisherVTT
No.126
ISSN (Electronic)1459-7683

Fingerprint

Field programmable gate arrays (FPGA)
Network protocols
Software architecture
Microcontrollers
Network architecture
Demonstrations
Hardware

Keywords

  • NoTA
  • FPGA

Cite this

Metso, M. (2009). NoTA L_INdown Layer Implementation in FGPA: Design results. Espoo: VTT Technical Research Centre of Finland. VTT Working Papers, No. 126
Metso, Mikko. / NoTA L_INdown Layer Implementation in FGPA : Design results. Espoo : VTT Technical Research Centre of Finland, 2009. 20 p. (VTT Working Papers; No. 126).
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Metso, M 2009, NoTA L_INdown Layer Implementation in FGPA: Design results. VTT Working Papers, no. 126, VTT Technical Research Centre of Finland, Espoo.

NoTA L_INdown Layer Implementation in FGPA : Design results. / Metso, Mikko.

Espoo : VTT Technical Research Centre of Finland, 2009. 20 p. (VTT Working Papers; No. 126).

Research output: Book/ReportReportProfessional

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T1 - NoTA L_INdown Layer Implementation in FGPA

T2 - Design results

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N2 - NoTA (Network on Terminal Architecture) is an architecture to ease connecting together different devices, or sub-systems inside a single device. DIP (Device Interconnect Protocol) stack is the backbone of each NoTA instance, consising of protocol layers necessary for passing data from one NoTA network endpoint to another. So far, only NoTA software implementations have been published. In this article, an FPGA hardware implementation of NoTA is evaluated. Part of the NoTA DIP (L_INdown layer for simplified RS-232) was designed, synthesised, implemented and verified on a Xilinx FPGA board ML507. The implementation was built purely in FPGA slice logic and no microcontroller was used. In this article, implemented NoTA FPGA demonstration and its challenges and results are briefly discussed.

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Metso M. NoTA L_INdown Layer Implementation in FGPA: Design results. Espoo: VTT Technical Research Centre of Finland, 2009. 20 p. (VTT Working Papers; No. 126).