Abstract
Timing adjustment in a digital modem is performed by interpolation after sampling with a fixed clock. A novel interpolator structure is proposed to avoid extrapolation problem, which arises if the fixed clock sampling rate is assumed to be equal to the nominal sampling rate of the interpolator output signal. The simulations indicate that the proposed structure works well and is superior to the conventional implementation.
Original language | English |
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Title of host publication | IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics, 2005 |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 1014 - 1017 |
ISBN (Print) | 0-7803-9068-7 |
DOIs | |
Publication status | Published - 15 Aug 2005 |
MoE publication type | A4 Article in a conference publication |
Event | 2005 IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics - Honolulu, United States Duration: 3 Apr 2005 → 7 Apr 2005 |
Conference
Conference | 2005 IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics |
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Country/Territory | United States |
City | Honolulu |
Period | 3/04/05 → 7/04/05 |
Keywords
- digital symbol synchronisation
- timing
- timing adjustment
- sampling rate
- synchronisation
- signal sampling
- interpolation
- filtering theory
- digital filters