Novel interpolator structure for digital symbol synchronisation

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    4 Citations (Scopus)

    Abstract

    Timing adjustment in a digital modem is performed by interpolation after sampling with a fixed clock. A novel interpolator structure is proposed to avoid extrapolation problem, which arises if the fixed clock sampling rate is assumed to be equal to the nominal sampling rate of the interpolator output signal. The simulations indicate that the proposed structure works well and is superior to the conventional implementation.
    Original languageEnglish
    Title of host publicationIEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics, 2005
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages1014 - 1017
    ISBN (Print)0-7803-9068-7
    DOIs
    Publication statusPublished - 15 Aug 2005
    MoE publication typeA4 Article in a conference publication
    Event2005 IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics - Honolulu, United States
    Duration: 3 Apr 20057 Apr 2005

    Conference

    Conference2005 IEEE/ACES International Conference on Wireless Communications and Applied Computational Electromagnetics
    Country/TerritoryUnited States
    CityHonolulu
    Period3/04/057/04/05

    Keywords

    • digital symbol synchronisation
    • timing
    • timing adjustment
    • sampling rate
    • synchronisation
    • signal sampling
    • interpolation
    • filtering theory
    • digital filters

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