Novel IP address lookup algorithm for inexpensive hardware implementation

The key factor defining the efficiency of IP routers is the speed of the forwarding operation, that is the speed of determining the next-hop destination for each packet. The operation is not simple because the IP addresses are unstructured and the destination subnetworks can be overlapping. This requires so called longest match lookup operation. In this paper I propose a simple and very fast address lookup algorithm that can be easily implemented in hardware. It is designed for inexpensive systems and thus requires only standard SRAM and FPGA devices. However, its performance exceeds even the requirements of today's backbone routers and it allows for incremental forwarding table updates.