Novel IP address lookup algorithm for inexpensive hardware implementation

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    Abstract

    The key factor defining the efficiency of IP routers is the speed of the forwarding operation, that is the speed of determining the next-hop destination for each packet. The operation is notsimple because the IP addresses are unstructured and the destination subnetworks can be overlapping. This requires so called longest match lookup operation. In this paper I propose a simple and very fast address lookup algorithm that can be easily implemented in hardware. It is designed for inexpensive systems and thus requires only standard SRAM and FPGA devices. However, its performance exceeds even the requirements of today's backbone routers and it allows for incremental forwarding table updates.
    Original languageEnglish
    Title of host publicationProceedings of the 6th WSEAS International Multiconference on Circuits, Systems,Communications and Computers, CSCC 2002
    PublisherWorld Scientific and Engineering Academy and Society, WSEAS
    Pages3371 - 3379
    ISBN (Print)960-8052-63-7
    Publication statusPublished - 2002
    MoE publication typeNot Eligible
    Event6th WSEAS World multiconference on circuits, systems, communications and computers - Rethymno, Greece
    Duration: 7 Jul 200214 Jul 2002

    Conference

    Conference6th WSEAS World multiconference on circuits, systems, communications and computers
    Country/TerritoryGreece
    CityRethymno
    Period7/07/0214/07/02

    Fingerprint

    Dive into the research topics of 'Novel IP address lookup algorithm for inexpensive hardware implementation'. Together they form a unique fingerprint.

    Cite this