Novel sub-100 nm thin film transistors

Sami Franssila, Jari Paloheimo, Pekka Kuivalainen

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Abstract

A new method is introduced for fabricating metal electrodes for thin film field-effect transistors having a source to drain distance in the sub-100 nm range. The method is based on a liftoff process with sidewall spacers and it is demonstrated by fabricating sub-100 nm polymer transistors. These are to the authors' knowledge the smallest polymer transistors reported.
Original languageEnglish
Pages (from-to)713 - 714
Number of pages2
JournalElectronics Letters
Volume29
Issue number8
DOIs
Publication statusPublished - 1993
MoE publication typeA1 Journal article-refereed

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Franssila, S., Paloheimo, J., & Kuivalainen, P. (1993). Novel sub-100 nm thin film transistors. Electronics Letters, 29(8), 713 - 714. https://doi.org/10.1049/el:19930477