Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

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Abstract

This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.
Original languageEnglish
Article number8678404
Number of pages9
JournalIEEE Journal on Selected Topics in Quantum Electronics
Volume25
Issue number5
Early online date1 Apr 2019
DOIs
Publication statusPublished - 1 Sep 2019
MoE publication typeA1 Journal article-refereed

Fingerprint

Photonics
integrated circuits
Integrated circuits
Waveguides
platforms
insulators
wafers
photonics
waveguides
Silicon
Optical losses
silicon
Birefringence
kits
Polarization
Infrared radiation
Fabrication
birefringence
Testing
manufacturing

Keywords

  • silicon photonics
  • silicon-on-insulator
  • gratings
  • strips
  • ribs
  • waveguide gratings
  • silicon
  • mirrors
  • integrated optics

Cite this

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title = "Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits",
abstract = "This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.",
keywords = "silicon photonics, silicon-on-insulator, gratings, strips, ribs, waveguide gratings, silicon, mirrors, integrated optics",
author = "Timo Aalto and Matteo Cherchi and Mikko Harjanne and Srivathsa Bhat and Paivi Heimala and Fei Sun and Markku Kapulainen and Tomi Hassinen and Tapani Vehmas",
note = "Project 118851",
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AU - Aalto, Timo

AU - Cherchi, Matteo

AU - Harjanne, Mikko

AU - Bhat, Srivathsa

AU - Heimala, Paivi

AU - Sun, Fei

AU - Kapulainen, Markku

AU - Hassinen, Tomi

AU - Vehmas, Tapani

N1 - Project 118851

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AB - This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

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KW - strips

KW - ribs

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KW - mirrors

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