Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Timo Aalto; Matteo Cherchi; Mikko Harjanne; Srivathsa Bhat; Paivi Heimala; Fei Sun; Markku Kapulainen; Tomi Hassinen; Tapani Vehmas

doi:10.1109/JSTQE.2019.2908551

Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Timo Aalto, Matteo Cherchi, Mikko Harjanne, Srivathsa Bhat, Paivi Heimala, Fei Sun, Markku Kapulainen, Tomi Hassinen, Tapani Vehmas

BA191C Silicon Photonics

Research output: Contribution to journal › Article › Scientific › peer-review

5 Citations (Scopus)

Abstract

This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

Original language	English
Article number	8678404
Number of pages	9
Journal	IEEE Journal on Selected Topics in Quantum Electronics
Volume	25
Issue number	5
Early online date	1 Apr 2019
DOIs	https://doi.org/10.1109/JSTQE.2019.2908551
Publication status	Published - 1 Sep 2019
MoE publication type	A1 Journal article-refereed

Keywords

silicon photonics
silicon-on-insulator
gratings
strips
ribs
waveguide gratings
silicon
mirrors
integrated optics
OtaNano

Access to Document

10.1109/JSTQE.2019.2908551

Link to publication in Scopus

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Equipment

OtaNano

VTT Technical Research Centre of Finland

Facility/equipment: Facility

Cite this

Aalto, T., Cherchi, M., Harjanne, M., Bhat, S., Heimala, P., Sun, F., Kapulainen, M., Hassinen, T., & Vehmas, T. (2019). Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits. IEEE Journal on Selected Topics in Quantum Electronics, 25(5), [8678404]. https://doi.org/10.1109/JSTQE.2019.2908551

@article{b1c13e82c6de4176b838af550f645067,

title = "Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits",

abstract = "This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.",

keywords = "silicon photonics, silicon-on-insulator, gratings, strips, ribs, waveguide gratings, silicon, mirrors, integrated optics, OtaNano",

author = "Timo Aalto and Matteo Cherchi and Mikko Harjanne and Srivathsa Bhat and Paivi Heimala and Fei Sun and Markku Kapulainen and Tomi Hassinen and Tapani Vehmas",

note = "Project 118851",

year = "2019",

month = sep,

day = "1",

doi = "10.1109/JSTQE.2019.2908551",

language = "English",

volume = "25",

journal = "IEEE Journal on Selected Topics in Quantum Electronics",

issn = "1077-260X",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

number = "5",

}

Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits. / Aalto, Timo ; Cherchi, Matteo ; Harjanne, Mikko ; Bhat, Srivathsa ; Heimala, Paivi ; Sun, Fei ; Kapulainen, Markku ; Hassinen, Tomi ; Vehmas, Tapani.

In: IEEE Journal on Selected Topics in Quantum Electronics, Vol. 25, No. 5, 8678404, 01.09.2019.

Research output: Contribution to journal › Article › Scientific › peer-review

TY - JOUR

T1 - Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

AU - Aalto, Timo

AU - Cherchi, Matteo

AU - Harjanne, Mikko

AU - Bhat, Srivathsa

AU - Heimala, Paivi

AU - Sun, Fei

AU - Kapulainen, Markku

AU - Hassinen, Tomi

AU - Vehmas, Tapani

N1 - Project 118851

PY - 2019/9/1

Y1 - 2019/9/1

N2 - This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

AB - This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

KW - silicon photonics

KW - silicon-on-insulator

KW - gratings

KW - strips

KW - ribs

KW - waveguide gratings

KW - silicon

KW - mirrors

KW - integrated optics

KW - OtaNano

UR - http://www.scopus.com/inward/record.url?scp=85068130869&partnerID=8YFLogxK

U2 - 10.1109/JSTQE.2019.2908551

DO - 10.1109/JSTQE.2019.2908551

M3 - Article

VL - 25

JO - IEEE Journal on Selected Topics in Quantum Electronics

JF - IEEE Journal on Selected Topics in Quantum Electronics

SN - 1077-260X

IS - 5

M1 - 8678404

ER -