Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Timo Aalto; Matteo Cherchi; Mikko Harjanne; Srivathsa Bhat; Paivi Heimala; Fei Sun; Markku Kapulainen; Tomi Hassinen; Tapani Vehmas

doi:10.1109/JSTQE.2019.2908551

Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Research output: Contribution to journal › Article › Scientific › peer-review

Abstract

This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

Original language	English
Article number	8678404
Number of pages	9
Journal	IEEE Journal of Selected Topics in Quantum Electronics
Volume	25
Issue number	5
DOIs	https://doi.org/10.1109/JSTQE.2019.2908551
Publication status	Published - 1 Sept 2019
MoE publication type	A1 Journal article-refereed

Funding

Abstract\u2014This paper gives an overview of the 3-\u00B5m silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (\u223C0.1 dB/cm), ultradense integration (\u00B5m-scale bends), small polarization dependency (down-to-zero birefringence), and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150-mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs, and small-to-medium volume manufacturing.

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

SDG 9 Industry, Innovation, and Infrastructure

Keywords

silicon photonics
silicon-on-insulator
gratings
strips
ribs
waveguide gratings
silicon
mirrors
integrated optics
OtaNano

Access to Document

10.1109/JSTQE.2019.2908551

Cite this

@article{b1c13e82c6de4176b838af550f645067,

title = "Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits",

abstract = "This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (\textasciitilde{}0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R\&D runs and small-to-medium volume manufacturing.",

keywords = "silicon photonics, silicon-on-insulator, gratings, strips, ribs, waveguide gratings, silicon, mirrors, integrated optics, OtaNano",

author = "Timo Aalto and Matteo Cherchi and Mikko Harjanne and Srivathsa Bhat and Paivi Heimala and Fei Sun and Markku Kapulainen and Tomi Hassinen and Tapani Vehmas",

year = "2019",

month = sep,

day = "1",

doi = "10.1109/JSTQE.2019.2908551",

language = "English",

volume = "25",

journal = "IEEE Journal of Selected Topics in Quantum Electronics",

issn = "1077-260X",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

number = "5",

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T1 - Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

AU - Aalto, Timo

AU - Cherchi, Matteo

AU - Harjanne, Mikko

AU - Bhat, Srivathsa

AU - Heimala, Paivi

AU - Sun, Fei

AU - Kapulainen, Markku

AU - Hassinen, Tomi

AU - Vehmas, Tapani

PY - 2019/9/1

Y1 - 2019/9/1

N2 - This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

AB - This paper gives an overview of the 3 μm silicon-on-insulator (SOI) platform that is openly available from VTT and suitable for the realization of photonic integrated circuits (PICs) for near and mid-infrared applications. Specific benefits of this thick-SOI PIC platform include low optical losses (~0.1 dB/cm), ultra-dense integration (μm-scale bends), small polarization dependency (down-to-zero birefringence) and ability to tolerate relatively high optical powers (>1 W). Fabrication technology is based on an i-line stepper and 150 mm wafer size. Open access to the waveguide platform is supported by design kits, wafer-level testing, multi-project wafer runs, dedicated R&D runs and small-to-medium volume manufacturing.

KW - silicon photonics

KW - silicon-on-insulator

KW - gratings

KW - strips

KW - ribs

KW - waveguide gratings

KW - silicon

KW - mirrors

KW - integrated optics

KW - OtaNano

UR - https://www.scopus.com/pages/publications/85068130869

U2 - 10.1109/JSTQE.2019.2908551

DO - 10.1109/JSTQE.2019.2908551

M3 - Article

SN - 1077-260X

VL - 25

JO - IEEE Journal of Selected Topics in Quantum Electronics

JF - IEEE Journal of Selected Topics in Quantum Electronics

IS - 5

M1 - 8678404

ER -

Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Abstract

Funding

UN SDGs

Keywords

Access to Document

Other files and links

Fingerprint

Photonic technologies for progrAmmable transmission and switching modular systems based on Scalable Spectrum/space aggregation for future agIle high capacity metrO Networks

OtaNano

Cite this

Open-access 3 μm SOI waveguide platform for dense photonic integrated circuits

Abstract

Funding

UN SDGs

Keywords

Access to Document

Other files and links

Fingerprint

Projects

Photonic technologies for progrAmmable transmission and switching modular systems based on Scalable Spectrum/space aggregation for future agIle high capacity metrO Networks

Equipment

OtaNano

Cite this