TY - GEN
T1 - Optical buffering and time-slot interchanger with integrated si-based delay lines
AU - Moralis-Pegios, Miltiadis
AU - Mourgias-Alexandris, George
AU - Terzenidis, Nikos
AU - Cherchi, Matteo
AU - Harjanne, Mikko
AU - Aalto, Timo
AU - Miliou, Amalia
AU - Pleros, Nikos
AU - Vyrsokinos, Konstantinos
PY - 2017/1/1
Y1 - 2017/1/1
N2 - We demonstrate an optical buffer and a
time-slot-interchanger utilizing Si-based spiral delay
lines integrated on a micro-scale SOI platform and
providing variable delays ranging between 6.5nsec and
17.2ns. 10Gbp/s error-free operation is reported.
AB - We demonstrate an optical buffer and a
time-slot-interchanger utilizing Si-based spiral delay
lines integrated on a micro-scale SOI platform and
providing variable delays ranging between 6.5nsec and
17.2ns. 10Gbp/s error-free operation is reported.
KW - OtaNano
UR - http://www.scopus.com/inward/record.url?scp=85027968631&partnerID=8YFLogxK
U2 - 10.1364/PS.2017.PTu1D.2
DO - 10.1364/PS.2017.PTu1D.2
M3 - Conference article in proceedings
T3 - OSA Technical Digest
BT - Advanced Photonics 2017 (IPR, NOMA, Sensors, Networks, SPPCom, PS)
PB - Optical Society of America OSA
T2 - Photonics in Switching, Advanced Photonics, PS 2017
Y2 - 24 July 2017 through 27 July 2017
ER -