Abstract
We demonstrate a time-slot interchanger (TSI) unit
utilizing differentially biased SOA-MZI wavelength
converters. Replacement of the fiber delay lines with
integrated waveguides is also investigated. We report
error-free rearrangement of three 10Gbps data packets for
the fiber case and error-free transmission through the
integrated delays.
| Original language | English |
|---|---|
| Title of host publication | 2017 IEEE Photonics Society Summer Topicals Meeting Series (SUM) |
| Publisher | IEEE Institute of Electrical and Electronic Engineers |
| Pages | 21-22 |
| ISBN (Electronic) | 978-1-5090-6571-4, 978-1-5090-6570-7 |
| ISBN (Print) | 978-1-5090-6572-1 |
| DOIs | |
| Publication status | Published - 17 Aug 2017 |
| MoE publication type | A4 Article in a conference publication |
| Event | 2017 IEEE Photonics Society Summer Topicals Meeting Series - San Juan, Puerto Rico Duration: 10 Jul 2017 → 12 Jul 2017 |
Other
| Other | 2017 IEEE Photonics Society Summer Topicals Meeting Series |
|---|---|
| Abbreviated title | SUM 2017 |
| Country/Territory | Puerto Rico |
| City | San Juan |
| Period | 10/07/17 → 12/07/17 |
Funding
This work has been supported by ICT-STREAMS (Contract No 688172) and ICT-L3MATRIX (Contract No 688544).
Keywords
- integrated waveguide delay lines
- optical packet swtiching
- packet contention
- SOA-MZI
- time slot interchanger
- OtaNano
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