Outline of a thick control flow architecture

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.

Original languageEnglish
Title of host publicationProceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages1-6
Number of pages6
ISBN (Electronic)978-150904844-1
ISBN (Print)978-1-5090-4845-8
DOIs
Publication statusPublished - 2016
MoE publication typeNot Eligible
Event28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016 - Los Angeles, United States
Duration: 26 Oct 201628 Oct 2016

Conference

Conference28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016
CountryUnited States
CityLos Angeles
Period26/10/1628/10/16

Fingerprint

Flow control
Fibers
Synchronization
Parallel programming
Cost reduction
Machinery
Electric power utilization
Data storage equipment

Keywords

  • chaining
  • multithreading
  • parallel computing
  • processor architecture
  • programming model
  • TCF

Cite this

Forsell, M., Roivainen, J., & Leppanen, V. (2016). Outline of a thick control flow architecture. In Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016 (pp. 1-6). [7803667] IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/SBAC-PADW.2016.9
Forsell, Martti ; Roivainen, Jussi ; Leppanen, Ville. / Outline of a thick control flow architecture. Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016. IEEE Institute of Electrical and Electronic Engineers , 2016. pp. 1-6
@inproceedings{8ec4b206d9874155bf77091b886c13bb,
title = "Outline of a thick control flow architecture",
abstract = "The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.",
keywords = "chaining, multithreading, parallel computing, processor architecture, programming model, TCF",
author = "Martti Forsell and Jussi Roivainen and Ville Leppanen",
year = "2016",
doi = "10.1109/SBAC-PADW.2016.9",
language = "English",
isbn = "978-1-5090-4845-8",
pages = "1--6",
booktitle = "Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016",
publisher = "IEEE Institute of Electrical and Electronic Engineers",
address = "United States",

}

Forsell, M, Roivainen, J & Leppanen, V 2016, Outline of a thick control flow architecture. in Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016., 7803667, IEEE Institute of Electrical and Electronic Engineers , pp. 1-6, 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016, Los Angeles, United States, 26/10/16. https://doi.org/10.1109/SBAC-PADW.2016.9

Outline of a thick control flow architecture. / Forsell, Martti; Roivainen, Jussi; Leppanen, Ville.

Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016. IEEE Institute of Electrical and Electronic Engineers , 2016. p. 1-6 7803667.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

TY - GEN

T1 - Outline of a thick control flow architecture

AU - Forsell, Martti

AU - Roivainen, Jussi

AU - Leppanen, Ville

PY - 2016

Y1 - 2016

N2 - The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.

AB - The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.

KW - chaining

KW - multithreading

KW - parallel computing

KW - processor architecture

KW - programming model

KW - TCF

UR - http://www.scopus.com/inward/record.url?scp=85014279494&partnerID=8YFLogxK

U2 - 10.1109/SBAC-PADW.2016.9

DO - 10.1109/SBAC-PADW.2016.9

M3 - Conference article in proceedings

AN - SCOPUS:85014279494

SN - 978-1-5090-4845-8

SP - 1

EP - 6

BT - Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016

PB - IEEE Institute of Electrical and Electronic Engineers

ER -

Forsell M, Roivainen J, Leppanen V. Outline of a thick control flow architecture. In Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016. IEEE Institute of Electrical and Electronic Engineers . 2016. p. 1-6. 7803667 https://doi.org/10.1109/SBAC-PADW.2016.9