Outline of a thick control flow architecture

Martti Forsell; Jussi Roivainen; Ville Leppänen

doi:10.1109/SBAC-PADW.2016.9

Outline of a thick control flow architecture

Martti Forsell, Jussi Roivainen, Ville Leppänen

University of Turku

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

4 Citations (Scopus)

Abstract

The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.

Original language	English
Title of host publication	Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW 2016)
Publisher	IEEE Institute of Electrical and Electronic Engineers
Number of pages	6
ISBN (Electronic)	978-1-5090-4844-1
ISBN (Print)	978-1-5090-4845-8
DOIs	https://doi.org/10.1109/SBAC-PADW.2016.9
Publication status	Published - 2016
MoE publication type	A4 Article in a conference publication
Event	28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016 - Los Angeles, United States Duration: 26 Oct 2016 → 28 Oct 2016

Conference

Conference	28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016
Country/Territory	United States
City	Los Angeles
Period	26/10/16 → 28/10/16

Keywords

chaining
multithreading
parallel computing
processor architecture
programming model
TCF

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10.1109/SBAC-PADW.2016.9

Cite this

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title = "Outline of a thick control flow architecture",

abstract = "The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.",

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publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

note = "28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016 ; Conference date: 26-10-2016 Through 28-10-2016",

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Forsell, M, Roivainen, J & Leppänen, V 2016, Outline of a thick control flow architecture. in Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW 2016)., 7803667, IEEE Institute of Electrical and Electronic Engineers, 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops, SBAC-PADW 2016, Los Angeles, California, United States, 26/10/16. https://doi.org/10.1109/SBAC-PADW.2016.9

Outline of a thick control flow architecture. / Forsell, Martti; Roivainen, Jussi; Leppänen, Ville.
Proceedings of the 28th IEEE International Symposium on Computer Architecture and High Performance Computing Workshops (SBAC-PADW 2016). IEEE Institute of Electrical and Electronic Engineers, 2016. 7803667.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

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AB - The recently invented thick control flow (TCF) model packs together an unbounded number of fibers, thread-like computational entities, flowing through the same control path. This promises to simplify parallel programming by partially eliminating looping and artificial thread arithmetics. In this paper we outline an architecture for efficiently executing programs written for the TCF model. It features scalable latency hiding via replication of instructions, radical synchronization cost reduction via a wave-based synchronization mechanism, and improved low-level parallelism exploitation via chaining of functional units. Replication of instructions is supported by a dynamic multithreading-like mechanism, which saves the fiber-wise data into special replicated register blocks. The architecture facilitates programmers with compact, unbounded notation of fibers and groups of them together with strong synchronous shared memory algorithmics. According to evaluations, the architecture is able to efficiently handle workloads featuring computational elements with the same control flow, independently of the number of elements. In its turn, this pays out as improved performance and lower power consumption due to elimination of redundant parts of computation and machinery.

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Outline of a thick control flow architecture

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