ParLe - A parallel computing learning set for MPSOCs/NOCs

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    1 Citation (Scopus)

    Abstract

    Programming and design skills in parallel computing related to systems on chip (SOC) will become increasingly important since future SOCs will have multiple processors interconnected via on-chip networks (NOC). Unfortunately there exist no easy-to-use tools for learning and experimenting with multiprocessor (MP)SOCs/NOCs, but one must use ad-hoc combinations of tools, methodologies and sample applications from very different sources. In this paper we introduce a parallel computing learning set (ParLe) for configurable shared memory MPSOCs/NOCs and corresponding theoretical parallel random access machines (PRAM). The learning set consists of an experimental optimizing compiler for high-level parallel programming language e and assembler, linker, loader, simulator with a graphical user interface and statistical tools, and sample e/assembler code. Using the set, a student/designer can easily write simple parallel programs, compile and load them into a configurable MPSOC/NOC platform, execute/debug them, gather statistics and explore the performance, utilization, and gate count estimations with different architectural parameters. The learning set runs on Mac OS X systems and is available for non-profit educational purposes.
    Original languageEnglish
    Title of host publication2005 International Symposium on System-on-Chip: Proceedings
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages90-95
    ISBN (Print)0-7803-9294-9
    DOIs
    Publication statusPublished - 2005
    MoE publication typeA4 Article in a conference publication
    Event2005 International Symposium on System-on-Chip, SOC 2005 - Tampere, Finland
    Duration: 15 Nov 200517 Nov 2005

    Conference

    Conference2005 International Symposium on System-on-Chip, SOC 2005
    Abbreviated titleSOC 2005
    Country/TerritoryFinland
    CityTampere
    Period15/11/0517/11/05

    Keywords

    • Parallel computing
    • MPSOC
    • NOC
    • learning
    • programming
    • simulation

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