Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver

Antti Anttonen; Tapio Rautio

doi:10.1109/ISCAS.2002.1010499

Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver

Antti Anttonen (Corresponding author), Tapio Rautio

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

2 Citations (Scopus)

Abstract

Adaptive sample rate converters (SRC) for the multi-standard mobile transceiver have been designed. GSM, UMTS and HIPERLAN2 standards have been chosen to establish the requirements for the SRCs. In the transmitter, the output signal of the data modulator is sampled at the symbol or chip frequency specified by the standards and needs to be converted into a common updating frequency of the D/A-converter. Pulse shaping and emission mask requirements are taken into account. In the receiver, A/D-conversion is also performed at a common fixed clock rate. Thus the SRC is needed to convert the A/D-converter sampling rate into a symbol or chip frequency that will be applied for further baseband signal processing. Channelization requirements defined by the standards are used as criteria for the performance analysis in the receiver. Based on the performance analysis, the complexity analysis is covered. It includes computational complexity, gate count, area and power consumption estimation for the chosen platform.

Original language	English
Title of host publication	Proceedings 2002 IEEE International Symposium on Circuits and Systems
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	489-492
Volume	4
ISBN (Print)	0-7803-7448-7
DOIs	https://doi.org/10.1109/ISCAS.2002.1010499
Publication status	Published - 2002
MoE publication type	A4 Article in a conference publication
Event	IEEE International Symposium on Circuits and Systems, ISCAS 2002 - Phoenix-Scottsdale, United States Duration: 26 May 2002 → 29 May 2002

Conference

Conference	IEEE International Symposium on Circuits and Systems, ISCAS 2002
Country/Territory	United States
City	Phoenix-Scottsdale
Period	26/05/02 → 29/05/02

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Cite this

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title = "Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver",

abstract = "Adaptive sample rate converters (SRC) for the multi-standard mobile transceiver have been designed. GSM, UMTS and HIPERLAN2 standards have been chosen to establish the requirements for the SRCs. In the transmitter, the output signal of the data modulator is sampled at the symbol or chip frequency specified by the standards and needs to be converted into a common updating frequency of the D/A-converter. Pulse shaping and emission mask requirements are taken into account. In the receiver, A/D-conversion is also performed at a common fixed clock rate. Thus the SRC is needed to convert the A/D-converter sampling rate into a symbol or chip frequency that will be applied for further baseband signal processing. Channelization requirements defined by the standards are used as criteria for the performance analysis in the receiver. Based on the performance analysis, the complexity analysis is covered. It includes computational complexity, gate count, area and power consumption estimation for the chosen platform.",

author = "Antti Anttonen and Tapio Rautio",

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language = "English",

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volume = "4",

pages = "489--492",

booktitle = "Proceedings 2002 IEEE International Symposium on Circuits and Systems",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

note = "IEEE International Symposium on Circuits and Systems, ISCAS 2002 ; Conference date: 26-05-2002 Through 29-05-2002",

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Anttonen, A & Rautio, T 2002, Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver. in Proceedings 2002 IEEE International Symposium on Circuits and Systems. vol. 4, IEEE Institute of Electrical and Electronic Engineers, pp. 489-492, IEEE International Symposium on Circuits and Systems, ISCAS 2002, Phoenix-Scottsdale, Arizona, United States, 26/05/02. https://doi.org/10.1109/ISCAS.2002.1010499

Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver. / Anttonen, Antti (Corresponding author); Rautio, Tapio.
Proceedings 2002 IEEE International Symposium on Circuits and Systems. Vol. 4 IEEE Institute of Electrical and Electronic Engineers, 2002. p. 489-492.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

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T1 - Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver

AU - Anttonen, Antti

AU - Rautio, Tapio

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N2 - Adaptive sample rate converters (SRC) for the multi-standard mobile transceiver have been designed. GSM, UMTS and HIPERLAN2 standards have been chosen to establish the requirements for the SRCs. In the transmitter, the output signal of the data modulator is sampled at the symbol or chip frequency specified by the standards and needs to be converted into a common updating frequency of the D/A-converter. Pulse shaping and emission mask requirements are taken into account. In the receiver, A/D-conversion is also performed at a common fixed clock rate. Thus the SRC is needed to convert the A/D-converter sampling rate into a symbol or chip frequency that will be applied for further baseband signal processing. Channelization requirements defined by the standards are used as criteria for the performance analysis in the receiver. Based on the performance analysis, the complexity analysis is covered. It includes computational complexity, gate count, area and power consumption estimation for the chosen platform.

AB - Adaptive sample rate converters (SRC) for the multi-standard mobile transceiver have been designed. GSM, UMTS and HIPERLAN2 standards have been chosen to establish the requirements for the SRCs. In the transmitter, the output signal of the data modulator is sampled at the symbol or chip frequency specified by the standards and needs to be converted into a common updating frequency of the D/A-converter. Pulse shaping and emission mask requirements are taken into account. In the receiver, A/D-conversion is also performed at a common fixed clock rate. Thus the SRC is needed to convert the A/D-converter sampling rate into a symbol or chip frequency that will be applied for further baseband signal processing. Channelization requirements defined by the standards are used as criteria for the performance analysis in the receiver. Based on the performance analysis, the complexity analysis is covered. It includes computational complexity, gate count, area and power consumption estimation for the chosen platform.

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M3 - Conference article in proceedings

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BT - Proceedings 2002 IEEE International Symposium on Circuits and Systems

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T2 - IEEE International Symposium on Circuits and Systems, ISCAS 2002

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ER -

Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver

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