Performance and complexity analysis for adaptive sample rate converters in GSM/UMTS/HIPERLAN2 mobile transceiver

Antti Anttonen (Corresponding author), Tapio Rautio

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

1 Citation (Scopus)

Abstract

Adaptive sample rate converters (SRC) for the multi-standard mobile transceiver have been designed. GSM, UMTS and HIPERLAN2 standards have been chosen to establish the requirements for the SRCs. In the transmitter, the output signal of the data modulator is sampled at the symbol or chip frequency specified by the standards and needs to be converted into a common updating frequency of the D/A-converter. Pulse shaping and emission mask requirements are taken into account. In the receiver, A/D-conversion is also performed at a common fixed clock rate. Thus the SRC is needed to convert the A/D-converter sampling rate into a symbol or chip frequency that will be applied for further baseband signal processing. Channelization requirements defined by the standards are used as criteria for the performance analysis in the receiver. Based on the performance analysis, the complexity analysis is covered. It includes computational complexity, gate count, area and power consumption estimation for the chosen platform.
Original languageEnglish
Title of host publicationProceedings 2002 IEEE International Symposium on Circuits and Systems
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages489-492
Volume4
ISBN (Print)0-7803-7448-7
DOIs
Publication statusPublished - 2002
MoE publication typeA4 Article in a conference publication
EventIEEE International Symposium on Circuits and Systems, ISCAS 2002 - Phoenix-Scottsdale, United States
Duration: 26 May 200229 May 2002

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2002
CountryUnited States
CityPhoenix-Scottsdale
Period26/05/0229/05/02

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