Performance comparison of experimented switching architectures for ATM

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR.
Original languageEnglish
Title of host publicationProceedings of the 22nd Euromicro Conference EUROMICRO 96
Subtitle of host publicationBeyond 2000, hardware/software design strategies
EditorsPeter Milligan, Krzysztof Kuchinski
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages405-411
ISBN (Print)978-0-8186-7487-7
DOIs
Publication statusPublished - 1996
MoE publication typeA4 Article in a conference publication
EventProceedings of the 22nd EUROMICRO Conference - Prague, Czech Republic
Duration: 2 Sep 19965 Sep 1996

Conference

ConferenceProceedings of the 22nd EUROMICRO Conference
CountryCzech Republic
CityPrague
Period2/09/965/09/96

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  • Cite this

    Zidbeck, J., & Raatikainen, P. (1996). Performance comparison of experimented switching architectures for ATM. In P. Milligan, & K. Kuchinski (Eds.), Proceedings of the 22nd Euromicro Conference EUROMICRO 96: Beyond 2000, hardware/software design strategies (pp. 405-411). IEEE Institute of Electrical and Electronic Engineers. https://doi.org/10.1109/EURMIC.1996.546464