Performance comparison of experimented switching architectures for ATM

Juha Zidbeck; Pertti Raatikainen

doi:10.1109/EURMIC.1996.546464

Performance comparison of experimented switching architectures for ATM

Juha Zidbeck, Pertti Raatikainen

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

Abstract

This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR.

Original language	English
Title of host publication	Proceedings of the 22nd Euromicro Conference EUROMICRO 96
Subtitle of host publication	Beyond 2000, hardware/software design strategies
Editors	Peter Milligan, Krzysztof Kuchinski
Publisher	IEEE Institute of Electrical and Electronic Engineers
Pages	405-411
ISBN (Print)	978-0-8186-7487-7
DOIs	https://doi.org/10.1109/EURMIC.1996.546464
Publication status	Published - 1996
MoE publication type	A4 Article in a conference publication
Event	Proceedings of the 22nd EUROMICRO Conference - Prague, Czech Republic Duration: 2 Sept 1996 → 5 Sept 1996

Conference

Conference	Proceedings of the 22nd EUROMICRO Conference
Country/Territory	Czech Republic
City	Prague
Period	2/09/96 → 5/09/96

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10.1109/EURMIC.1996.546464

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Zidbeck, J., & Raatikainen, P. (1996). Performance comparison of experimented switching architectures for ATM. In P. Milligan, & K. Kuchinski (Eds.), Proceedings of the 22nd Euromicro Conference EUROMICRO 96: Beyond 2000, hardware/software design strategies (pp. 405-411). IEEE Institute of Electrical and Electronic Engineers. https://doi.org/10.1109/EURMIC.1996.546464

@inproceedings{3ad973ca853742089314844deb341ccc,

title = "Performance comparison of experimented switching architectures for ATM",

abstract = "This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR.",

author = "Juha Zidbeck and Pertti Raatikainen",

note = "Project code: TTE4355; Proceedings of the 22nd EUROMICRO Conference ; Conference date: 02-09-1996 Through 05-09-1996",

year = "1996",

doi = "10.1109/EURMIC.1996.546464",

language = "English",

isbn = "978-0-8186-7487-7",

pages = "405--411",

editor = "Peter Milligan and Krzysztof Kuchinski",

booktitle = "Proceedings of the 22nd Euromicro Conference EUROMICRO 96",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

}

Zidbeck, J & Raatikainen, P 1996, Performance comparison of experimented switching architectures for ATM. in P Milligan & K Kuchinski (eds), Proceedings of the 22nd Euromicro Conference EUROMICRO 96: Beyond 2000, hardware/software design strategies. IEEE Institute of Electrical and Electronic Engineers, pp. 405-411, Proceedings of the 22nd EUROMICRO Conference, Prague, Czech Republic, 2/09/96. https://doi.org/10.1109/EURMIC.1996.546464

Performance comparison of experimented switching architectures for ATM. / Zidbeck, Juha; Raatikainen, Pertti.
Proceedings of the 22nd Euromicro Conference EUROMICRO 96: Beyond 2000, hardware/software design strategies. ed. / Peter Milligan; Krzysztof Kuchinski. IEEE Institute of Electrical and Electronic Engineers, 1996. p. 405-411.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - Performance comparison of experimented switching architectures for ATM

AU - Zidbeck, Juha

AU - Raatikainen, Pertti

N1 - Project code: TTE4355

PY - 1996

Y1 - 1996

N2 - This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR.

AB - This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR.

U2 - 10.1109/EURMIC.1996.546464

DO - 10.1109/EURMIC.1996.546464

M3 - Conference article in proceedings

SN - 978-0-8186-7487-7

SP - 405

EP - 411

BT - Proceedings of the 22nd Euromicro Conference EUROMICRO 96

A2 - Milligan, Peter

A2 - Kuchinski, Krzysztof

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - Proceedings of the 22nd EUROMICRO Conference

Y2 - 2 September 1996 through 5 September 1996

ER -

Performance comparison of experimented switching architectures for ATM

Abstract

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