Physical and Electrical Characterization of ALD Chalcogenide Materials for 3D Memory Applications

Vijay Narasimhan, V. Adinolfi, L. Cheng, Martin E. McBriarty, Mikko Utriainen, Feng Gao, Riikka, L. Puurunen, Karl Littau

Research output: Contribution to conferenceConference AbstractScientificpeer-review

Abstract

In three-dimensional memory integration schemes, like those used forcurrent NAND Flash memory technologies, the active layers of the memory devices are filled into vias with aspect ratios of 40:1 or greater. It is important for the deposited films to demonstrate consistent properties all the way through the depth of the via. Recently, novel ALD chalcogenide materials have emerged [1-3] that could be used as phase-change memory (PCM) and ovonic threshold switch (OTS) selectors. ALD chalcogenides are attractive because they could be compatible with 3D integration schemes; however, the properties of these films in high-aspect ratio structures have not been extensively investigated. In this study, we use PillarHall® Lateral High Aspect Ratio (LHAR) test chips [4-6] to elucidate the properties of ALD chalcogenides on a trench wall using standard in-plane metrology techniques without fabricating full device stacks. The PillarHall all-silicon LHAR test chip includes multiple trenches in the aspect ratio range 2:1 - 10000:1 with constant 500 nm gap height [6]. LHAR chips are used as substrates for ALD binary and ternary chalcogenide films using HGeCl3, [(CH3)3Si]2Te, [(CH3)3Si]2Se, and (C2H5O)4Te as precursors. Using optical microscopy, scanning electron microscopy with energy-dispersive x-ray spectroscopy, and scanning-probe techniques, we describe the chemical, physical, mechanical, and electrical properties of these films. We show that the thickness and atomic composition of certain chalcogenide films changes dramatically inside of high-aspect ratio features (Fig. S1). Furthermore, we perform optical profilometry on silicon micromembranes on the PillarHall test chips (Fig. S2) to rapidly stimate the ALD film stress on the microscopic level, which is not directly measurable in devices today despite its importance in 3D architectures. We use these results to comment on the ALD reaction kinetics and discuss implications for future research on ALD chalcogenide films. Combining high-aspect ratio and stress measurements on a single test chip can accelerate R&D of ALD chalcogenides for applications in PCMs and OTSs as well as other microscopic 3D applications of ALD thin films.
Original languageEnglish
Pages62-62
Number of pages1
Publication statusPublished - 22 Jul 2019
MoE publication typeNot Eligible
Event19th International Conference on Atomic Layer Deposition, ALD 2019 - Bellevue, Washington, United States
Duration: 21 Jul 201924 Jul 2019
https://ald2019.avs.org/

Conference

Conference19th International Conference on Atomic Layer Deposition, ALD 2019
Abbreviated titleALD2019
CountryUnited States
CityWashington
Period21/07/1924/07/19
Internet address

Keywords

  • OtaNano

Fingerprint Dive into the research topics of 'Physical and Electrical Characterization of ALD Chalcogenide Materials for 3D Memory Applications'. Together they form a unique fingerprint.

Cite this