An improved analytical model for IGB power transistors has been developed for circuit simulators. Special attention is paid to the physical modeling of the short channel in the DMOS branch and the buffer layer near the anode in IGBT device structures. Good agreement between simulated and measured data has been obtained.
|Series||Simulation of Semiconductor Devices and Processes|
|Conference||Fifth International Conference on Simulation of Semiconductor Devices and Processes (SISDEP 93)|
|Period||7/09/93 → 9/09/93|