Physical modelling of vertisal DMOS power transistors for circuit simulation

Mikael Andersson, Pekka Kuivalainen

Research output: Contribution to journalArticleScientificpeer-review

Abstract

A physical model for vertical DMOS power transistors is presented. The model takes into account various short channel effects in the DMOS channel region and the velocity saturation and the exact device geometry in the drift region. The model, aimed at computer aided design of power integrated circuits, has been implemented in the APLAC circuit simulator. A good agreement between the measured and simulated results for vertical DMOSTs is demonstrated.
Original languageEnglish
Pages (from-to)157-158
Number of pages2
JournalPhysica Scripta
Volume1994
Issue numberT54
DOIs
Publication statusPublished - 1994
MoE publication typeA1 Journal article-refereed

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Physical Modeling
Circuit Simulation
transistors
Vertical
Computer-aided Design
Integrated Circuits
Physical Model
Saturation
Simulator
simulation
computer aided design
simulators
integrated circuits
Model
saturation
geometry

Cite this

Andersson, Mikael ; Kuivalainen, Pekka. / Physical modelling of vertisal DMOS power transistors for circuit simulation. In: Physica Scripta. 1994 ; Vol. 1994, No. T54. pp. 157-158.
@article{89618dff803e48b9ab00addeac4d82fc,
title = "Physical modelling of vertisal DMOS power transistors for circuit simulation",
abstract = "A physical model for vertical DMOS power transistors is presented. The model takes into account various short channel effects in the DMOS channel region and the velocity saturation and the exact device geometry in the drift region. The model, aimed at computer aided design of power integrated circuits, has been implemented in the APLAC circuit simulator. A good agreement between the measured and simulated results for vertical DMOSTs is demonstrated.",
author = "Mikael Andersson and Pekka Kuivalainen",
note = "Project code: ELE41061",
year = "1994",
doi = "10.1088/0031-8949/1994/T54/038",
language = "English",
volume = "1994",
pages = "157--158",
journal = "Physica Scripta",
issn = "0031-8949",
publisher = "Institute of Physics IOP",
number = "T54",

}

Physical modelling of vertisal DMOS power transistors for circuit simulation. / Andersson, Mikael; Kuivalainen, Pekka.

In: Physica Scripta, Vol. 1994, No. T54, 1994, p. 157-158.

Research output: Contribution to journalArticleScientificpeer-review

TY - JOUR

T1 - Physical modelling of vertisal DMOS power transistors for circuit simulation

AU - Andersson, Mikael

AU - Kuivalainen, Pekka

N1 - Project code: ELE41061

PY - 1994

Y1 - 1994

N2 - A physical model for vertical DMOS power transistors is presented. The model takes into account various short channel effects in the DMOS channel region and the velocity saturation and the exact device geometry in the drift region. The model, aimed at computer aided design of power integrated circuits, has been implemented in the APLAC circuit simulator. A good agreement between the measured and simulated results for vertical DMOSTs is demonstrated.

AB - A physical model for vertical DMOS power transistors is presented. The model takes into account various short channel effects in the DMOS channel region and the velocity saturation and the exact device geometry in the drift region. The model, aimed at computer aided design of power integrated circuits, has been implemented in the APLAC circuit simulator. A good agreement between the measured and simulated results for vertical DMOSTs is demonstrated.

U2 - 10.1088/0031-8949/1994/T54/038

DO - 10.1088/0031-8949/1994/T54/038

M3 - Article

VL - 1994

SP - 157

EP - 158

JO - Physica Scripta

JF - Physica Scripta

SN - 0031-8949

IS - T54

ER -