Porous silicon electrodes for high performance integrated supercapacitors

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    2 Citations (Scopus)

    Abstract

    We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.
    Original languageEnglish
    Title of host publicationProceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Number of pages3
    ISBN (Electronic)978-1-4799-4026-4
    DOIs
    Publication statusPublished - 2014
    MoE publication typeA4 Article in a conference publication
    Event5th Electronics System-Integration Technology Conference, ESTC 2014 - Helsinki, Finland
    Duration: 16 Sep 201418 Sep 2014
    Conference number: 5th

    Conference

    Conference5th Electronics System-Integration Technology Conference, ESTC 2014
    Abbreviated titleESTC 2014
    CountryFinland
    CityHelsinki
    Period16/09/1418/09/14

    Fingerprint

    electrochemical capacitors
    porous silicon
    electrodes
    atomic layer epitaxy
    high aspect ratio
    radiant flux density
    flux density
    capacitance
    porosity
    coatings
    cycles
    matrices

    Cite this

    Grigoras, K., Keskinen, J., Ahopelto, J., & Prunnila, M. (2014). Porous silicon electrodes for high performance integrated supercapacitors. In Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014 IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/ESTC.2014.6962717
    Grigoras, Kestutis ; Keskinen, J. ; Ahopelto, Jouni ; Prunnila, Mika. / Porous silicon electrodes for high performance integrated supercapacitors. Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers , 2014.
    @inproceedings{f3b7a0953ff3451ea4eeb80081b7a0d2,
    title = "Porous silicon electrodes for high performance integrated supercapacitors",
    abstract = "We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.",
    author = "Kestutis Grigoras and J. Keskinen and Jouni Ahopelto and Mika Prunnila",
    note = "Project code: 73742",
    year = "2014",
    doi = "10.1109/ESTC.2014.6962717",
    language = "English",
    booktitle = "Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014",
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    Grigoras, K, Keskinen, J, Ahopelto, J & Prunnila, M 2014, Porous silicon electrodes for high performance integrated supercapacitors. in Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers , 5th Electronics System-Integration Technology Conference, ESTC 2014, Helsinki, Finland, 16/09/14. https://doi.org/10.1109/ESTC.2014.6962717

    Porous silicon electrodes for high performance integrated supercapacitors. / Grigoras, Kestutis; Keskinen, J.; Ahopelto, Jouni; Prunnila, Mika.

    Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers , 2014.

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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    T1 - Porous silicon electrodes for high performance integrated supercapacitors

    AU - Grigoras, Kestutis

    AU - Keskinen, J.

    AU - Ahopelto, Jouni

    AU - Prunnila, Mika

    N1 - Project code: 73742

    PY - 2014

    Y1 - 2014

    N2 - We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.

    AB - We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.

    U2 - 10.1109/ESTC.2014.6962717

    DO - 10.1109/ESTC.2014.6962717

    M3 - Conference article in proceedings

    BT - Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014

    PB - IEEE Institute of Electrical and Electronic Engineers

    ER -

    Grigoras K, Keskinen J, Ahopelto J, Prunnila M. Porous silicon electrodes for high performance integrated supercapacitors. In Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers . 2014 https://doi.org/10.1109/ESTC.2014.6962717