Porous silicon electrodes for high performance integrated supercapacitors

Kestutis Grigoras; Jari Keskinen; Jouni Ahopelto; Mika Prunnila

doi:10.1109/ESTC.2014.6962717

Porous silicon electrodes for high performance integrated supercapacitors

Kestutis Grigoras, Jari Keskinen, Jouni Ahopelto, Mika Prunnila

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

3 Citations (Scopus)

Abstract

We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.

Original language	English
Title of host publication	Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014
Publisher	IEEE Institute of Electrical and Electronic Engineers
Number of pages	3
ISBN (Electronic)	978-1-4799-4026-4
DOIs	https://doi.org/10.1109/ESTC.2014.6962717
Publication status	Published - 2014
MoE publication type	A4 Article in a conference publication
Event	5th Electronics System-Integration Technology Conference, ESTC 2014 - Helsinki, Finland Duration: 16 Sept 2014 → 18 Sept 2014 Conference number: 5th

Conference

Conference	5th Electronics System-Integration Technology Conference, ESTC 2014
Abbreviated title	ESTC 2014
Country/Territory	Finland
City	Helsinki
Period	16/09/14 → 18/09/14

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10.1109/ESTC.2014.6962717

Cite this

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title = "Porous silicon electrodes for high performance integrated supercapacitors",

abstract = "We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.",

author = "Kestutis Grigoras and Jari Keskinen and Jouni Ahopelto and Mika Prunnila",

note = "Project code: 73742 ; 5th Electronics System-Integration Technology Conference, ESTC 2014, ESTC 2014 ; Conference date: 16-09-2014 Through 18-09-2014",

year = "2014",

doi = "10.1109/ESTC.2014.6962717",

language = "English",

booktitle = "Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014",

publisher = "IEEE Institute of Electrical and Electronic Engineers",

address = "United States",

}

Grigoras, K, Keskinen, J, Ahopelto, J & Prunnila, M 2014, Porous silicon electrodes for high performance integrated supercapacitors. in Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers, 5th Electronics System-Integration Technology Conference, ESTC 2014, Helsinki, Finland, 16/09/14. https://doi.org/10.1109/ESTC.2014.6962717

Porous silicon electrodes for high performance integrated supercapacitors. / Grigoras, Kestutis; Keskinen, Jari; Ahopelto, Jouni et al.
Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014. IEEE Institute of Electrical and Electronic Engineers, 2014.

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific › peer-review

TY - GEN

T1 - Porous silicon electrodes for high performance integrated supercapacitors

AU - Grigoras, Kestutis

AU - Keskinen, Jari

AU - Ahopelto, Jouni

AU - Prunnila, Mika

N1 - Conference code: 5th

PY - 2014

Y1 - 2014

N2 - We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.

AB - We demonstrate high performance porous Si based supercapacitor electrodes that can be utilized in integrated micro supercapacitors. The key enabler here is ultra-thin TiN coating of the porous Si matrix leading to high power and stability. The TiN layer is deposited by atomic layer deposition (ALD), which provides sufficient conformality to reach the bottom of the high aspect ratio pores. Our porous Si supercapacitor devices exhibit almost ideal double layer capacitor characteristic with electrode volumetric capacitance of 7.3 F/cm. Several orders of magnitude increase in power and energy density is obtained comparing to uncoated porous silicon electrodes. Good stability of devices is confirmed performing over 5 000 charge/discharge cycles.

U2 - 10.1109/ESTC.2014.6962717

DO - 10.1109/ESTC.2014.6962717

M3 - Conference article in proceedings

BT - Proceedings of the 5th Electronics System-integration Technology Conference, ESTC 2014

PB - IEEE Institute of Electrical and Electronic Engineers

T2 - 5th Electronics System-Integration Technology Conference, ESTC 2014

Y2 - 16 September 2014 through 18 September 2014

ER -

Porous silicon electrodes for high performance integrated supercapacitors

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