Precise length definition of active GaAs-based optoelectronic devices for low-loss silicon photonics integration

The length variation associated with standard cleaving of III–V optoelectronic chips is a major source of loss in the integration with the micron-scale silicon-on-insulator waveguides. To this end, a new, to the best of our knowledge, approach for precise definition of the III–V chip length is reported. The method employs lithography and wet etching of cleave marks outside the active III–V waveguides. The marks follow a specific crystallographic orientation and are used to initiate and guide the cleaving process. Besides minimizing the air gap between the butt-coupled III–V and Si waveguides and hence minimizing the coupling losses, the use of precisely defined length significantly improves the integration yield owing to the increased length uniformity. We apply this technique to defining the lengths of GaAs-based semiconductor optical amplifiers and demonstrate length control with an accuracy better than 250 nm per facet. This variation is more than 1 order of magnitude smaller than with the traditional cleaving methods, resulting in improvement of coupling by several dBs.