Quick and clean: Stencil lithography for wafer-scale fabrication of superconducting tunnel junctions

V. Savu, Jani Kivioja, Jouni Ahopelto, J. Brugger

    Research output: Contribution to journalArticleScientificpeer-review

    6 Citations (Scopus)

    Abstract

    This paper presents a resist-less process for parallel fabrication of sub-micrometer Al-AlOx-Al superconducting tunnel junctions. A custom stencil is fabricated containing 200 nm low-stress SiN membranes with micro-apertures. The stencil is aligned and clamped with a 1 mum accuracy to a substrate wafer containing Ti-Au contact electrodes. The junctions are fabricated by evaporating Al from two different angles, with an intermediate in-situ oxidation step. Measurements of the devices down to 0.3 K show stencil lithography is a good candidate for parallel, resist-less patterning of sub-micrometer area tunnel junctions. Challenges are addressed and further developments are proposed.
    Original languageEnglish
    Pages (from-to)242-244
    Number of pages3
    JournalIEEE Transactions on Applied Superconductivity
    Volume19
    Issue number3
    DOIs
    Publication statusPublished - 2009
    MoE publication typeA1 Journal article-refereed

    Fingerprint

    Tunnel junctions
    tunnel junctions
    Lithography
    micrometers
    lithography
    wafers
    Fabrication
    fabrication
    electric contacts
    apertures
    membranes
    Membranes
    Oxidation
    oxidation
    Electrodes
    electrodes
    Substrates

    Keywords

    • Shadow mask
    • Stencil lithography
    • STJ
    • Superconducting tunnel junction

    Cite this

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    title = "Quick and clean: Stencil lithography for wafer-scale fabrication of superconducting tunnel junctions",
    abstract = "This paper presents a resist-less process for parallel fabrication of sub-micrometer Al-AlOx-Al superconducting tunnel junctions. A custom stencil is fabricated containing 200 nm low-stress SiN membranes with micro-apertures. The stencil is aligned and clamped with a 1 mum accuracy to a substrate wafer containing Ti-Au contact electrodes. The junctions are fabricated by evaporating Al from two different angles, with an intermediate in-situ oxidation step. Measurements of the devices down to 0.3 K show stencil lithography is a good candidate for parallel, resist-less patterning of sub-micrometer area tunnel junctions. Challenges are addressed and further developments are proposed.",
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    author = "V. Savu and Jani Kivioja and Jouni Ahopelto and J. Brugger",
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    doi = "10.1109/TASC.2009.2019075",
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    Quick and clean : Stencil lithography for wafer-scale fabrication of superconducting tunnel junctions. / Savu, V.; Kivioja, Jani; Ahopelto, Jouni; Brugger, J.

    In: IEEE Transactions on Applied Superconductivity, Vol. 19, No. 3, 2009, p. 242-244.

    Research output: Contribution to journalArticleScientificpeer-review

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    T2 - Stencil lithography for wafer-scale fabrication of superconducting tunnel junctions

    AU - Savu, V.

    AU - Kivioja, Jani

    AU - Ahopelto, Jouni

    AU - Brugger, J.

    PY - 2009

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    AB - This paper presents a resist-less process for parallel fabrication of sub-micrometer Al-AlOx-Al superconducting tunnel junctions. A custom stencil is fabricated containing 200 nm low-stress SiN membranes with micro-apertures. The stencil is aligned and clamped with a 1 mum accuracy to a substrate wafer containing Ti-Au contact electrodes. The junctions are fabricated by evaporating Al from two different angles, with an intermediate in-situ oxidation step. Measurements of the devices down to 0.3 K show stencil lithography is a good candidate for parallel, resist-less patterning of sub-micrometer area tunnel junctions. Challenges are addressed and further developments are proposed.

    KW - Shadow mask

    KW - Stencil lithography

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    KW - Superconducting tunnel junction

    U2 - 10.1109/TASC.2009.2019075

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