Realtime structured analysis in system level design of embedded ASICs

Timo Juntunen; Jorma Kivelä; Auli Reinikka; Matti Sipola; Juha-Pekka Soininen; Kari Tiensyrjä; Tuomo Tikkanen

doi:10.1016/0165-6074(88)90095-6

Realtime structured analysis in system level design of embedded ASICs

Timo Juntunen
, Jorma Kivelä
, Auli Reinikka
, Matti Sipola
, Juha-Pekka Soininen
, Kari Tiensyrjä
, Tuomo Tikkanen

Research output: Contribution to journal › Article › Scientific › peer-review

7 Citations (Scopus)

Abstract

Current VLSI technology has made it feasible to manufacture and design an application specific system on a single chip. Design complexity of a system-on-a-chip calls for an integrated HW/SW design methodology to support the design process from requirements capture to implementation design. This paper presents how a graphics oriented real-time structured analysis (RT-SA) method has been adapted to specification and design of embedded ASICs. Also a real application example is presented.

Original language	English
Pages (from-to)	449-454
Journal	Microprocessing and Microprogramming
Volume	24
Issue number	1-5
DOIs	https://doi.org/10.1016/0165-6074(88)90095-6
Publication status	Published - 1988
MoE publication type	A1 Journal article-refereed
Event	Supercomputers: Technology and Applications: Euromicro '88 - Zürich, Switzerland Duration: 29 Aug 1988 → 1 Sept 1988

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10.1016/0165-6074(88)90095-6

Cite this

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title = "Realtime structured analysis in system level design of embedded ASICs",

abstract = "Current VLSI technology has made it feasible to manufacture and design an application specific system on a single chip. Design complexity of a system-on-a-chip calls for an integrated HW/SW design methodology to support the design process from requirements capture to implementation design. This paper presents how a graphics oriented real-time structured analysis (RT-SA) method has been adapted to specification and design of embedded ASICs. Also a real application example is presented.",

author = "Timo Juntunen and Jorma Kivel{\"a} and Auli Reinikka and Matti Sipola and Juha-Pekka Soininen and Kari Tiensyrj{\"a} and Tuomo Tikkanen",

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doi = "10.1016/0165-6074(88)90095-6",

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journal = "Microprocessing and Microprogramming",

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T1 - Realtime structured analysis in system level design of embedded ASICs

AU - Juntunen, Timo

AU - Kivelä, Jorma

AU - Reinikka, Auli

AU - Sipola, Matti

AU - Soininen, Juha-Pekka

AU - Tiensyrjä, Kari

AU - Tikkanen, Tuomo

PY - 1988

Y1 - 1988

N2 - Current VLSI technology has made it feasible to manufacture and design an application specific system on a single chip. Design complexity of a system-on-a-chip calls for an integrated HW/SW design methodology to support the design process from requirements capture to implementation design. This paper presents how a graphics oriented real-time structured analysis (RT-SA) method has been adapted to specification and design of embedded ASICs. Also a real application example is presented.

AB - Current VLSI technology has made it feasible to manufacture and design an application specific system on a single chip. Design complexity of a system-on-a-chip calls for an integrated HW/SW design methodology to support the design process from requirements capture to implementation design. This paper presents how a graphics oriented real-time structured analysis (RT-SA) method has been adapted to specification and design of embedded ASICs. Also a real application example is presented.

U2 - 10.1016/0165-6074(88)90095-6

DO - 10.1016/0165-6074(88)90095-6

M3 - Article

SN - 0165-6074

VL - 24

SP - 449

EP - 454

JO - Microprocessing and Microprogramming

JF - Microprocessing and Microprogramming

IS - 1-5

T2 - Supercomputers: Technology and Applications

Y2 - 29 August 1988 through 1 September 1988

ER -

Realtime structured analysis in system level design of embedded ASICs

Abstract

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