Abstract
This paper explores a new DC-DC converter design
constraint for adaptable systems that target the
minimum-energy point (MEP). Traditionally, DC-DC
converters have regulated to a fixed output voltage over
a wide range of input voltages. For energy-constrained
systems that target the MEP, regulating them to a fixed
voltage is unnecessary since changes in the output
voltage near the MEP have little impact on the energy per
cycle. This paper applies a new and traditional design
constraint to a 3:1 series-parallel switched-capacitor
(SC) DC-DC converter in 28 nm CMOS. The new design
constraint allows for decreased design time, less area,
and less system-level energy per cycle compared to
traditional constraints.
| Original language | English |
|---|---|
| Title of host publication | International Symposium on Low Power Electronics and Design (ISLPED) |
| Publisher | IEEE Institute of Electrical and Electronic Engineers |
| Pages | 383-388 |
| ISBN (Electronic) | 978-1-4799-1235-3, 978-1-4799-1234-6 |
| DOIs | |
| Publication status | Published - 2013 |
| MoE publication type | A4 Article in a conference publication |
| Event | ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013 - Beijing, China Duration: 4 Sept 2013 → 6 Sept 2013 |
Conference
| Conference | ACM/IEEE International Symposium on Low Power Electronics and Design, ISLPED 2013 |
|---|---|
| Abbreviated title | ISLPED 2013 |
| Country/Territory | China |
| City | Beijing |
| Period | 4/09/13 → 6/09/13 |