Role of process gases in making tapered through-silicon vias for 3D MEMS packaging

Preadeep Dixit, Sami Vähänen, Jaakko Salonen, Philippe Monnoyer

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

Abstract

This article report a continuous plasma etching process using SF 6/O2/Ar gases for fabricating 100 µm deep tapered through-silicon vias (TSV). The flow rates of the process gases were changed to study their individual effect on the profile angle, via depth, sidewall roughness, and sideways undercut of the tapered vias. Tapered vias having profile angles varying from 70° to 85° and smooth sidewalls were etched by balancing the chemically-assisted isotropic etching of F* radicals, passivation film by O2, and ion-assisted passivation etching. The flow rates of SF6 and O2 were found to be the important factors which determine the profile angle and via surface roughness. After considering the individual effects of each gas, an optimized etching recipe was fixed, which was used to etch 100 µm deep vias having a profile angle of 83°. Insulation and seed layers were deposited by conventional low-temperature processes. The tapered vias were then partially filled by copper electrodeposition and redistribution lines were formed. The electrical resistance of tapered TSVs was measured to be between 3-8 m for the majority of the TSVs.
Original languageEnglish
Title of host publicationProceedings
Subtitle of host publication7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages35-38
ISBN (Electronic)978-1-4673-1638-5
ISBN (Print)978-1-4673-1635-4
DOIs
Publication statusPublished - 2012
MoE publication typeNot Eligible
Event7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012 - Taipei, Taiwan, Province of China
Duration: 24 Oct 201226 Oct 2012

Conference

Conference7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012
Abbreviated titleIMPACT 2012
CountryTaiwan, Province of China
CityTaipei
Period24/10/1226/10/12

Fingerprint

MEMS
Etching
Packaging
Passivation
Silicon
Surface roughness
Gases
Flow rate
Acoustic impedance
Plasma etching
Electrodeposition
Seed
Insulation
Copper
Ions
Temperature

Cite this

Dixit, P., Vähänen, S., Salonen, J., & Monnoyer, P. (2012). Role of process gases in making tapered through-silicon vias for 3D MEMS packaging. In Proceedings: 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012 (pp. 35-38). IEEE Institute of Electrical and Electronic Engineers . https://doi.org/10.1109/IMPACT.2012.6420230
Dixit, Preadeep ; Vähänen, Sami ; Salonen, Jaakko ; Monnoyer, Philippe. / Role of process gases in making tapered through-silicon vias for 3D MEMS packaging. Proceedings: 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012. IEEE Institute of Electrical and Electronic Engineers , 2012. pp. 35-38
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abstract = "This article report a continuous plasma etching process using SF 6/O2/Ar gases for fabricating 100 µm deep tapered through-silicon vias (TSV). The flow rates of the process gases were changed to study their individual effect on the profile angle, via depth, sidewall roughness, and sideways undercut of the tapered vias. Tapered vias having profile angles varying from 70° to 85° and smooth sidewalls were etched by balancing the chemically-assisted isotropic etching of F* radicals, passivation film by O2, and ion-assisted passivation etching. The flow rates of SF6 and O2 were found to be the important factors which determine the profile angle and via surface roughness. After considering the individual effects of each gas, an optimized etching recipe was fixed, which was used to etch 100 µm deep vias having a profile angle of 83°. Insulation and seed layers were deposited by conventional low-temperature processes. The tapered vias were then partially filled by copper electrodeposition and redistribution lines were formed. The electrical resistance of tapered TSVs was measured to be between 3-8 m for the majority of the TSVs.",
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Dixit, P, Vähänen, S, Salonen, J & Monnoyer, P 2012, Role of process gases in making tapered through-silicon vias for 3D MEMS packaging. in Proceedings: 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012. IEEE Institute of Electrical and Electronic Engineers , pp. 35-38, 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012, Taipei, Taiwan, Province of China, 24/10/12. https://doi.org/10.1109/IMPACT.2012.6420230

Role of process gases in making tapered through-silicon vias for 3D MEMS packaging. / Dixit, Preadeep; Vähänen, Sami; Salonen, Jaakko; Monnoyer, Philippe.

Proceedings: 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012. IEEE Institute of Electrical and Electronic Engineers , 2012. p. 35-38.

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

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N2 - This article report a continuous plasma etching process using SF 6/O2/Ar gases for fabricating 100 µm deep tapered through-silicon vias (TSV). The flow rates of the process gases were changed to study their individual effect on the profile angle, via depth, sidewall roughness, and sideways undercut of the tapered vias. Tapered vias having profile angles varying from 70° to 85° and smooth sidewalls were etched by balancing the chemically-assisted isotropic etching of F* radicals, passivation film by O2, and ion-assisted passivation etching. The flow rates of SF6 and O2 were found to be the important factors which determine the profile angle and via surface roughness. After considering the individual effects of each gas, an optimized etching recipe was fixed, which was used to etch 100 µm deep vias having a profile angle of 83°. Insulation and seed layers were deposited by conventional low-temperature processes. The tapered vias were then partially filled by copper electrodeposition and redistribution lines were formed. The electrical resistance of tapered TSVs was measured to be between 3-8 m for the majority of the TSVs.

AB - This article report a continuous plasma etching process using SF 6/O2/Ar gases for fabricating 100 µm deep tapered through-silicon vias (TSV). The flow rates of the process gases were changed to study their individual effect on the profile angle, via depth, sidewall roughness, and sideways undercut of the tapered vias. Tapered vias having profile angles varying from 70° to 85° and smooth sidewalls were etched by balancing the chemically-assisted isotropic etching of F* radicals, passivation film by O2, and ion-assisted passivation etching. The flow rates of SF6 and O2 were found to be the important factors which determine the profile angle and via surface roughness. After considering the individual effects of each gas, an optimized etching recipe was fixed, which was used to etch 100 µm deep vias having a profile angle of 83°. Insulation and seed layers were deposited by conventional low-temperature processes. The tapered vias were then partially filled by copper electrodeposition and redistribution lines were formed. The electrical resistance of tapered TSVs was measured to be between 3-8 m for the majority of the TSVs.

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Dixit P, Vähänen S, Salonen J, Monnoyer P. Role of process gases in making tapered through-silicon vias for 3D MEMS packaging. In Proceedings: 7th International Microsystems, Packaging, Assembly and Circuits Technology Conference, IMPACT 2012. IEEE Institute of Electrical and Electronic Engineers . 2012. p. 35-38 https://doi.org/10.1109/IMPACT.2012.6420230