Sequential Processor Architecture Research at VTT

Martti Forsell

Sequential Processor Architecture Research at VTT

Martti Forsell

Research output: Chapter in Book/Report/Conference proceeding › Conference article in proceedings › Scientific

Abstract

In this presentation we will describe transport triggered architecture (TTA) related sequential processor architecture research committed at VTT. The short description and status of our TTA project is given. The advantages and problems of TTA are discussed. Minimal Pipeline Architecture (MPA) is introduced to address the problems of TTA. The results of evaluation of MPA are given. Finally, open research problems are listed.

Original language	English
Title of host publication	TTA Workshop Notes 2002
Subtitle of host publication	Turku, Finland, 7 June 2002
Editors	Johan Lilius, Seppo Virtanen
Place of Publication	Turku
Publisher	Turku Centre for Computer Science
Pages	1-29
ISBN (Print)	951-29-2183-9
Publication status	Published - 2002
MoE publication type	B3 Non-refereed article in conference proceedings

Publication series

Series	TUCS General Publications
Number	21
ISSN	1239-1905

Keywords

sequential processor architecture
minimal pipeline architecture
transport triggered architecture

Cite this

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title = "Sequential Processor Architecture Research at VTT",

abstract = "In this presentation we will describe transport triggered architecture (TTA) related sequential processor architecture research committed at VTT. The short description and status of our TTA project is given. The advantages and problems of TTA are discussed. Minimal Pipeline Architecture (MPA) is introduced to address the problems of TTA. The results of evaluation of MPA are given. Finally, open research problems are listed.",

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KW - transport triggered architecture

M3 - Conference article in proceedings

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Sequential Processor Architecture Research at VTT

Abstract

Publication series

Keywords

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