Abstract
The arrival multi-core processors or chip multiprocessors
(CMP) operated with symmetrical multiprocessing (SMP) has
made parallel computing available to the masses.
Unfortunately the scalability of the SMP paradigm is poor
as the number of processor cores increases. Furthermore,
current alternatives to SMP, including non-uniform memory
access (NUMA), cache coherent non-uniform memory access
(CC-NUMA), vector computing (VEC), and message passing
(MP), provide poor performance in general purpose
parallel applications and/or programming with them is
difficult/tedious. According to recent investigations, an
idea from the early 90's - hardware implementation of a
strong model of computing, e.g. the Parallel Random
Access Machine (PRAM) model, this time on a scalable
on-chip distributed shared memory architecture, coupled
with the explicit PRAM-driven parallel programming
methodology - seem to avoid these problems and therefore
opens up an avenue of possibilities in future general
purpose parallel computing.
In this lecture, we (1) consider shortly the challenges
related to on-chip parallel computing, (2) introduce
shortly the current CMP paradigms and their problems, (3)
introduce the idea of shared memory parallel computing
under a strong model of computing, and (4) describe our
attempt to realize PRAM computation on a scalable CMP
architecture, experimental recursively parallel
programming language, and prototype tools for compiling
and optimizing programs written with the language for the
architecture. Simulation results and programming examples
are given.
Original language | English |
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Publication status | Published - 2008 |
MoE publication type | Not Eligible |
Event | Seminar on Future Technologies for Shared-Memory Parallel Computing - Ylivieska, Finland Duration: 29 Apr 2008 → 29 Apr 2008 |
Conference
Conference | Seminar on Future Technologies for Shared-Memory Parallel Computing |
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Country/Territory | Finland |
City | Ylivieska |
Period | 29/04/08 → 29/04/08 |
Keywords
- parallel computing
- CMP
- VLSI
- models of computing
- PRAM