Strong programming models for MP-SOCs

Due to poor performance scalability potential of single processor SOCs, MP-SOCs employing multiple well-integrated processor cores are increasingly being used to cover computing needs of embedded and now also low-end general purpose systems. This shift from single core to multicore sys- tems, however, has raised an old but very challenging problem to the limelights of embedded and gen- eral purpose system design—How to program MP-SOCs so that application development would not be more difficult than for single core SOCs and still get high performance and utilization out of them for a very wide range of application-specific and general purpose algorithms? Apparently the current models making use of asynchronous shared memory and message passing do not fulfill neither programmabil- ity nor performance requirements. In this presentation we propose using strong programming models to solve the programmability problems of MP-SOCs and discuss about required architectural changes to underlying MP-SOC architectures. The models are based on synchronous shared memory concept that is supported by the only well-developed and widely usable theory of parallel algorithms.