@inproceedings{1999c3dfa54a4dd5b468d7c45004abca,
title = "System-level modeling of dynamically reconfigurable co-processors",
abstract = "Dynamically reconfigurable co-processors are interesting design alternatives when both flexibility and performance are concerns. Traditional design methods and tools do not provide the support for the design of reconfigurable parts, which requires an easily adaptable solution at the system level to perform fast exploration of different configuration techniques and technologies. In this paper, we present a system-level modeling technique of dynamically reconfigurable co-processors and associated tools. Our approach includes a high-level synthesis-based estimator to support the system partitioning, a SystemC-based modeling method of the reconfiguration process while taking into account different configuration technologies, and a transformation tool to support the reuse of existing SystemC code. Software/hardware modules and modules inside reconfigurable co-processors are coded using the same mechanism, which allows a module to be easily switched from one implementation alterative to the other in design space exploration. The easy-to-use approach is verified with a MPEG2 decoder example.",
keywords = "System-level, modeling, dynamic reconfiguration, co-processor",
author = "Yang Qu and Kari Tiensyrj{\"a} and Kostas Masselos",
year = "2004",
doi = "10.1007/978-3-540-30117-2\_93",
language = "English",
isbn = "978-3-540-22989-6",
series = "Lecture Notes in Computer Science",
publisher = "Springer",
pages = "881--885",
editor = "J{\"u}rgen Becker and Marco Platzner and Serge Vernalde",
booktitle = "Field-Programmable Logic and Applications",
address = "Germany",
note = "Field-Programmable Logic and Applications, 14th International Conference, FPL 2004 ; Conference date: 30-08-2004 Through 01-09-2004",
}