@inproceedings{f75d12b7e2254b5c925419bea73c3f7c,
title = "System-level modeling of dynamically reconfigurable hardware with SystemC",
abstract = "To cope with the increasing demand for higher computational power and flexibility, dynamically re-configurable blocks become an important part inside a system-on-chip. Several methods have been proposed to incorporate their reconfiguration aspects in to a design flow. They all lack either an interface to commercially available and industrially used tools or are restricted to a single vendor or technology environment. Therefore a methodology for modeling of dynamically re-configurable blocks at the system-level using SystemC 2.0 is presented. The high-level model is based on a multi-context representation of the different functionalities that will be mapped on the re-configurable block during different run-time periods. By specifying the estimated times of context-switching and active-running in the selected functionality modes, the methodology allows to do true design space exploration at the system-level, without the need to map the design first to an actual technology implementation.",
keywords = "dynamic reconfiguration, design methods, system-level",
author = "Antti Pelkonen and Kostas Masselos and Miroslav Cupac",
note = "Project code: E1SU00325; 17th International Parallel and Distributed Processing Symposium, IPDPS 2003 ; Conference date: 22-04-2003 Through 26-04-2003",
year = "2003",
doi = "10.1109/IPDPS.2003.1213321",
language = "English",
isbn = "0-7695-1926-1",
series = "Proceedings - IEEE International Parallel and Distributed Processing Symposium",
publisher = "IEEE Institute of Electrical and Electronic Engineers",
pages = "174--181",
booktitle = "Proceedings, International Parallel and Distributed Processing Symposium",
address = "United States",
}