System-level performance evaluation of distributed multi-core NoTA systems

Subayal Khan, Jukka Saastamoinen, Nurmi

Research output: Contribution to conferenceConference articleScientific


For future applications running on nomadic devices operating in smart spaces, the availability of the services and the quest for better alternative services will go hand in hand to enable the best-possible experience for the end-user. To realize it, a service-level interoperability solution must be devised that would enable applications to access services over heterogeneous platforms and various transport technologies. The recent extension of the Network-on-Terminal-Architecture (NoTA) supports service-level interoperability between mobile devices via a device interconnect protocol (NoTA DIP), enabling applications to access and discover services over multiple transport technologies in a seamless manner. For system design, NoTA provides three abstraction levels .i.e., functional architecture, logical architecture and implementation architecture. A brisk performance evaluation phase is required for evaluating the feasibility of new NoTA systems employing modern multi-core based subsystems. To achieve this goal, NoTA Functional architecture components .i.e., Application Nodes (ANs) and Service Nodes (ANs) are first refined to encompassing processes and then to subsystem services and functions to form a layered functional architecture of NoTA system. In next step, the NoTA functional architecture layers are mapped to ABSOLUT workload model layers employed in performance simulation. Furthermore, the ABSOLUT workload models corresponding to different NoTA DIP implementations for example NoTA DIP kernel implementation and NOTA DIP Daemon mode must be modeled and integrated to ABSOLUT. The approach is experimented with a case study employing a distributed NoTA system. The same methodology can be used to evaluate the performance of non-distributed NoTA systems where all the subsystems reside on the same device. MARTE UML2.0 profile, Papyrus UML 2.0 modeling tool and SystemC were used for modeling and simulation.
Original languageEnglish
Publication statusPublished - 2011
MoE publication typeNot Eligible
Event2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, NESEA 2011 - Fremantle, Australia
Duration: 8 Dec 20119 Dec 2011
Conference number: 2


Conference2nd IEEE International Conference on Networked Embedded Systems for Enterprise Applications, NESEA 2011
Abbreviated title NESEA 2011


  • NoTA
  • SystemC
  • Performance Simulation


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