SystemC based approach

Yang Qu; Kari Tiensyrjä

SystemC based approach

Yang Qu
, Kari Tiensyrjä

VTT Technical Research Centre of Finland

Research output: Chapter in Book/Report/Conference proceeding › Chapter or book article › Professional

Abstract

This chapter describes the SystemC based modelling techniques and tools that support the design of reconfigurable systems-on-chip (SoC). For designing of reconfigurable parts at system level, we developed: 1) an estimation method and tool for estimating the execution time and the resource consumption of function blocks on dynamically reconfigurable logic to support system partitioning, 2) a SystemC based modeling method and tool for reconfigurable parts to allow fast design space exploration through 3) system-level simulation using transaction-level models of the system.

Original language	English
Title of host publication	System Level Design of Reconfigurable Systems-on-Chip
Editors	Nikolaos Voros, Konstantinos Masselos
Place of Publication	Dordrecht; NL
Publisher	Springer
Chapter	5
Pages	107-131
ISBN (Electronic)	978-0-387-26104-1
ISBN (Print)	978-0-387-26103-4, 978-1-4419-3864-0
Publication status	Published - 2005
MoE publication type	D2 Article in professional manuals or guides or professional information systems or text book material

Cite this

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title = "SystemC based approach",

abstract = "This chapter describes the SystemC based modelling techniques and tools that support the design of reconfigurable systems-on-chip (SoC). For designing of reconfigurable parts at system level, we developed: 1) an estimation method and tool for estimating the execution time and the resource consumption of function blocks on dynamically reconfigurable logic to support system partitioning, 2) a SystemC based modeling method and tool for reconfigurable parts to allow fast design space exploration through 3) system-level simulation using transaction-level models of the system.",

author = "Yang Qu and Kari Tiensyrj{\"a}",

note = "Project code: E1SU00325",

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AB - This chapter describes the SystemC based modelling techniques and tools that support the design of reconfigurable systems-on-chip (SoC). For designing of reconfigurable parts at system level, we developed: 1) an estimation method and tool for estimating the execution time and the resource consumption of function blocks on dynamically reconfigurable logic to support system partitioning, 2) a SystemC based modeling method and tool for reconfigurable parts to allow fast design space exploration through 3) system-level simulation using transaction-level models of the system.

M3 - Chapter or book article

SN - 978-0-387-26103-4

SN - 978-1-4419-3864-0

SP - 107

EP - 131

BT - System Level Design of Reconfigurable Systems-on-Chip

A2 - Voros, Nikolaos

A2 - Masselos, Konstantinos

PB - Springer

CY - Dordrecht; NL

ER -

SystemC based approach

Abstract

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