SystemC-based design methodology for reconfigurable system-on-chip

Yang Qu, Kari Tiensyrjä, Juha-Pekka Soininen

Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

17 Citations (Scopus)

Abstract

Reconfigurable system is a promising alternative to deliver both flexibility and performance at the same time. New reconfigurable technologies and technology-dependent tools have been developed, but a system-level design methodology to support system analysis and fast design space exploration is missing. In this paper, we present a SystemC-based system-level design approach. The main focuses are the resource estimation to support system analysis and reconfiguration modeling for fast performance simulation. The approach was applied in a real design case of a WCDMA detector on a commercially available reconfigurable platform. The run-time reconfiguration was used and the design showed 40% area saving when compared to a functionally equivalent fixed system and 30 times better in processing time when compared to a functionally equivalent pure software design.
Original languageEnglish
Title of host publicationProceedings of the 8th Euromicro Conference on Digital System Design
PublisherIEEE Institute of Electrical and Electronic Engineers
Pages364-371
ISBN (Print)0-7695-2433-8
DOIs
Publication statusPublished - 2005
MoE publication typeA4 Article in a conference publication
Event8th Euromicro Conference on Digital System Design, DSD 2015 - Funchal, Madeira, Portugal
Duration: 30 Aug 20053 Sept 2005
Conference number: 8

Conference

Conference8th Euromicro Conference on Digital System Design, DSD 2015
Abbreviated title DSD 2015
Country/TerritoryPortugal
CityFunchal, Madeira
Period30/08/053/09/05

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