The dependency notation as a graphical description language for logic design and silicon compilation

Jorma E. Kivelä, Hannu H. Heusala, Timo T. Juntunen, Jukka A. Lahti, Juha Pekka Soininen, Seppo Säynäjäkangas

Research output: Contribution to journalArticleScientificpeer-review

1 Citation (Scopus)

Abstract

The graphical symbolism of the depedency notation as stated in the IEC standard 617-12 can be used as a graphical design language for LSI circuits. The use of dependency notation with automatic cell compilation tools can make the human interface of electronics workstations easier to use and learn. This paper describes the use of dependency notation graphics as an architectural description tool in complex logic hardware design. Then an experimental CAD tool for dependency notation and automatic cell compilation called DEMET is introduced.
Original languageEnglish
Pages (from-to)631-635
JournalMicroprocessing and Microprogramming
Volume18
Issue number1-5
DOIs
Publication statusPublished - Dec 1986
MoE publication typeA1 Journal article-refereed

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