Abstract
In this paper, Silex Microsystems, the world's largest
Pure-Play MEMS foundry, together with partners TNO and
VTT, present our recent advancements in RF through
silicon Vias (TSV) for 3D integrated passive devices
(IPD) applications, achieved in conjunction with the
European consortium EPAMO. A novel open TSV fabrication
process on 200 mm diameter 305 µm thick High Resistivity
wafers has been used to demonstrated High Aspect Ratio
Through Silicon Vias (HAR TSV), focusing on tight pitch,
resulting in 36 TSV/mm2 Via density. 305 µm wafer
thickness enables the fabrication of rigid interposers,
an advancement in the commercialization of 3D packaging
technology. The fabrication includes double sided deep
reactive ion etching (DRIE), developments and evaluation
on various conformal high aspect ratio (HAR) plating
seedlayer processes, and void-free TSV Cu plating of open
rigid TSV structures and bonding to glass wafers for
characterization. The electrical characterization of the
fabricated devices was performed by VTT with excellent
measured RF properties: in specific, low RF losses as
well as low DC resistances of less than 20 mOhm/TSV.
Several different coplanar waveguide (CPW) test vehicles
and other RF TSV test structures together with Daisy
Chain and parasitic Capacitance test structures were
designed, fabricated and evaluated. The loss of a single
coplanar TSV transition is less than 0.04 dB @ 5 GHz,
which is considered to be very small. The developed TSV
technology was also employed to fabricate 3D toroidal
inductors. These inductors were characterized by TNO
showing high Q-factor (>30) and self-resonance frequency
(> 6 GHz) for 3D inductors in the range of 1-15 nH. 1 and
2 port inductor temperature characteristics over
temperature interval from room temperature to 111°C are
reported. A fabrication integration scheme for fully
integrated RF-IPD with 3D TSV based inductors and high
ohmic polysilicon (p-Si) resistors and piezoelectric
(PZT) metal-insulator-metal (MIM) capacitors are
discussed. Outlook for improvements using integrated high
frequency magnetic flux materials and commercialization
aspects are described
Original language | English |
---|---|
Title of host publication | 2013 IEEE International 3D Systems Integration Conference (3DIC) |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
ISBN (Print) | 978-1-4673-6484-3 |
DOIs | |
Publication status | Published - 2013 |
MoE publication type | A4 Article in a conference publication |
Event | IEEE International 3D Systems Integration Conference, 3DIC 2013 - San Francisco, United States Duration: 2 Oct 2013 → 4 Oct 2013 |
Conference
Conference | IEEE International 3D Systems Integration Conference, 3DIC 2013 |
---|---|
Abbreviated title | 3DIC 2013 |
Country/Territory | United States |
City | San Francisco |
Period | 2/10/13 → 4/10/13 |
Keywords
- 3D IPD
- 3D Mechnical Stress
- Cu plating
- HAR TSV
- MEMS Manufacturing
- Q-value
- Reliablity
- RF Losses
- RF TSV
- Signal and Power Integrity
- Thermal Characterization
- Toroidal Inductors