The vertical IGBT with an implanted buried layer

Simo Eränen, Martti Blomberg

    Research output: Chapter in Book/Report/Conference proceedingConference article in proceedingsScientificpeer-review

    2 Citations (Scopus)

    Abstract

    The properties of vertical IGBT (insulated-gate bipolar transistor) test structures with implanted, self-aligned, boron doped buried layers are considered. In the case examined, the buried layers form retrograde p-type regions under the n-type sources of the IGBT. The modifications of the normal IGBT process, which are needed for the fabrication of the buried layers, are described. The process parameters and process steps which are relevant in the context of the buried layers are discussed. Some results from 1-D and 2-D process simulations are shown. Finally, the results of electrical measurements on test IGBTs with several kinds of buried layers and without the buried layers are reported. It is demonstrated that the latch-up current can be dramatically improved with the addition of the buried layer, whereas the forward conduction properties are independent of the buried layers.
    Original languageEnglish
    Title of host publicationProceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs
    EditorsMuhammed Ayman Shibib, B. Jayant Baliga
    Place of PublicationPiscataway
    PublisherIEEE Institute of Electrical and Electronic Engineers
    Pages211-214
    ISBN (Print)0-7803-0009-2
    DOIs
    Publication statusPublished - 1991
    MoE publication typeA4 Article in a conference publication
    EventInternational Symposium on Power Semiconductor Devices and ICs. 3 - Baltimore, United States
    Duration: 22 Apr 199124 Apr 1991

    Conference

    ConferenceInternational Symposium on Power Semiconductor Devices and ICs. 3
    CountryUnited States
    CityBaltimore
    Period22/04/9124/04/91

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  • Cite this

    Eränen, S., & Blomberg, M. (1991). The vertical IGBT with an implanted buried layer. In M. A. Shibib, & B. J. Baliga (Eds.), Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs (pp. 211-214). IEEE Institute of Electrical and Electronic Engineers. https://doi.org/10.1109/ISPSD.1991.146102