Abstract
The properties of vertical IGBT (insulated-gate bipolar transistor) test structures with implanted, self-aligned, boron doped buried layers are considered. In the case examined, the buried layers form retrograde p-type regions under the n-type sources of the IGBT. The modifications of the normal IGBT process, which are needed for the fabrication of the buried layers, are described. The process parameters and process steps which are relevant in the context of the buried layers are discussed. Some results from 1-D and 2-D process simulations are shown. Finally, the results of electrical measurements on test IGBTs with several kinds of buried layers and without the buried layers are reported. It is demonstrated that the latch-up current can be dramatically improved with the addition of the buried layer, whereas the forward conduction properties are independent of the buried layers.
Original language | English |
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Title of host publication | Proceedings of the 3rd International Symposium on Power Semiconductor Devices and ICs |
Editors | Muhammed Ayman Shibib, B. Jayant Baliga |
Place of Publication | Piscataway |
Publisher | IEEE Institute of Electrical and Electronic Engineers |
Pages | 211-214 |
ISBN (Print) | 0-7803-0009-2 |
DOIs | |
Publication status | Published - 1991 |
MoE publication type | A4 Article in a conference publication |
Event | International Symposium on Power Semiconductor Devices and ICs. 3 - Baltimore, United States Duration: 22 Apr 1991 → 24 Apr 1991 |
Conference
Conference | International Symposium on Power Semiconductor Devices and ICs. 3 |
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Country/Territory | United States |
City | Baltimore |
Period | 22/04/91 → 24/04/91 |